UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 244

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UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
244
Note The capture interrupt signal (INTTM00n) is not generated when the reverse-phase edge of the TI00n pin
Remark n = 0:
input is selected to the valid edge of CR00n.
n = 0, 1:
Figure 7-57. Example of Software Processing for Pulse Width Measurement (2/2)
<1> Count operation start flow
<2> Capture trigger input flow
<3> Count operation stop flow
Edge detection of TI00n, TI01n pins
µ
µ
Generates capture interrupt
PD78F0531, 78F0532, 78F0533
PD78F0534, 78F0535, 78F0536, 78F0537, 78F0537D
TMC0n3, TMC0n2 bits = 00
TMC0n3, TMC0n2 bits =
CR00n, CR01n registers
Calculated pulse width
Stores count value to
Register initial setting
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
from capture value
PRM0n register,
CRC0n register,
port setting
01 or 10
START
STOP
User’s Manual U17260EJ6V0UD
Note
Initial setting of these registers is performed
before setting the TMC0n3 and TMC0n2 bits.
Starts count operation
The counter is initialized and counting is stopped
by clearing the TMC0n3 and TMC0n2 bits to 00.

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