UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 87

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UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
3.4.6 Register indirect addressing
[Function]
[Operand format]
[Description example]
[Illustration]
Register pair contents specified by a register pair specify code in an instruction word and by a register bank
select flag (RBS0 and RBS1) serve as an operand address for addressing the memory.
This addressing can be carried out for all of the memory spaces. However, before addressing a memory bank
that is not set by the memory bank select register (BANK), change the setting of the memory bank by using
BANK.
MOV A, [DE]; when selecting [DE] as register pair
The contents of the memory
addressed are transferred.
DE
A
16
7
Identifier
D
[DE], [HL]
Operation code
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U17260EJ6V0UD
8
0
7
7
1
Description
Memory
0
E
0
0
0
1
0
0
0
1
The memory address
specified with the
register pair DE
87

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