UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 218

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

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Figure 7-35. Example of Register Settings in Clear & Start Mode Entered by TI00n Pin Valid Edge Input (2/2)
(d) Prescaler mode register 0n (PRM0n)
(e) 16-bit timer counter 0n (TM0n)
(f) 16-bit capture/compare register 00n (CR00n)
(g) 16-bit capture/compare register 01n (CR01n)
Remark n = 0:
ES1n1
0/1
By reading TM0n, the count value can be read.
When this register is used as a compare register and when its value matches the count value of TM0n, an
interrupt signal (INTTM00n) is generated. The count value of TM0n is not cleared.
To use this register as a capture register, select either the TI00n or TI01n pin
When the valid edge of the capture trigger is detected, the count value of TM0n is stored in CR00n.
Note The timer output (TO0n) cannot be used when detection of the valid edge of the TI01n pin is used.
When this register is used as a compare register and when its value matches the count value of TM0n, an
interrupt signal (INTTM01n) is generated. The count value of TM0n is not cleared.
When this register is used as a capture register, the TI00n pin input is used as a capture trigger. When the
valid edge of the capture trigger is detected, the count value of TM0n is stored in CR01n.
n = 0, 1:
ES1n0
0/1
µ
µ
PD78F0531, 78F0532, 78F0533
PD78F0534, 78F0535, 78F0536, 78F0537, 78F0537D
ES0n1
0/1
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
ES0n0
0/1
User’s Manual U17260EJ6V0UD
3
0
2
0
PRM0n1 PRM0n0
0/1
0/1
Count clock selection
(setting TI00n valid edge is prohibited)
00: Falling edge detection
01: Rising edge detection
10: Setting prohibited
11: Both edges detection
00: Falling edge detection
01: Rising edge detection
10: Setting prohibited
11: Both edges detection
(setting prohibited when CRC0n1 = 1)
Note
input as a capture trigger.