UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 382

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UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
382
(f) Reception error
Parity error
Framing error
Overrun error
Three types of errors may occur during reception: a parity error, framing error, or overrun error. If the error
flag of asynchronous serial interface reception error status register 6 (ASIS6) is set as a result of data
reception, a reception error interrupt request (INTSR6/INTSRE6) is generated.
Which error has occurred during reception can be identified by reading the contents of ASIS6 in the reception
error interrupt (INTSR6/INTSRE6) servicing (see Figure 15-6).
The contents of ASIS6 are cleared to 0 when ASIS6 is read.
The reception error interrupt can be separated into reception completion interrupt (INTSR6) and error
interrupt (INTSRE6) by clearing bit 0 (ISRM6) of asynchronous serial interface operation mode register 6
(ASIM6) to 0.
1. If ISRM6 is cleared to 0 (reception completion interrupt (INTSR6) and error interrupt (INTSRE6) are
2. If ISRM6 is set to 1 (error interrupt is included in INTSR6)
INTSRE6
INTSRE6
INTSR6
INTSR6
separated)
(a) No error during reception
(a) No error during reception
Reception Error
The parity specified for transmission does not match the parity of the receive data.
Stop bit is not detected.
Reception of the next data is completed before data is read from receive buffer
register 6 (RXB6).
CHAPTER 15 SERIAL INTERFACE UART6
Figure 15-20. Reception Error Interrupt
Table 15-3. Cause of Reception Error
User’s Manual U17260EJ6V0UD
INTSRE6
INTSRE6
INTSR6
INTSR6
Cause
(b) Error during reception
(b) Error during reception

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