UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 350

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

14.4.3 Dedicated baud rate generator
generates a serial clock for transmission/reception of UART0.
(1) Configuration of baud rate generator
350
The dedicated baud rate generator consists of a source clock selector and a 5-bit programmable counter, and
Separate 5-bit counters are provided for transmission and reception.
• Base clock
• Transmission counter
• Reception counter
The clock selected by bits 7 and 6 (TPS01 and TPS00) of baud rate generator control register 0 (BRGC0) is
supplied to each module when bit 7 (POWER0) of asynchronous serial interface operation mode register 0
(ASIM0) is 1. This clock is called the base clock and its frequency is called f
to low level when POWER0 = 0.
This counter stops operation, cleared to 0, when bit 7 (POWER0) or bit 6 (TXE0) of asynchronous serial
interface operation mode register 0 (ASIM0) is 0.
It starts counting when POWER0 = 1 and TXE0 = 1.
The counter is cleared to 0 when the first data transmitted is written to transmit shift register 0 (TXS0).
This counter stops operation, cleared to 0, when bit 7 (POWER0) or bit 5 (RXE0) of asynchronous serial
interface operation mode register 0 (ASIM0) is 0.
It starts counting when the start bit has been detected.
The counter stops operation after one frame has been received, until the next start bit is detected.
Remark POWER0: Bit 7 of asynchronous serial interface operation mode register 0 (ASIM0)
event counter
8-bit timer/
50 output
f
TXE0:
RXE0:
BRGC0:
f
PRS
PRS
f
PRS
/2
/2
/2
5
3
BRGC0: TPS01, TPS00
Figure 14-11. Configuration of Baud Rate Generator
Bit 6 of ASIM0
Bit 5 of ASIM0
Baud rate generator control register 0
POWER0
Selector
CHAPTER 14 SERIAL INTERFACE UART0
User’s Manual U17260EJ6V0UD
f
XCLK0
POWER0, TXE0 (or RXE0)
BRGC0: MDL04 to MDL00
Match detector
5-bit counter
Baud rate generator
1/2
XCLK0
. The base clock is fixed
Baud rate