UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 548

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

<R>
<R>
<R>
<R>
548
Address: FFBEH
Symbol
LVIM
Notes 1.
Cautions 1. To stop LVI, follow either of the procedures below.
LVION
LVISEL
LVIMD
LVIF
LVION
<7>
0
1
0
1
0
1
0
1
Notes 3, 4
Note 4
2.
3.
4.
Note 3
Note 3
After reset: 00H
2. Input voltage from external input pin (EXLVI) must be EXLVI < V
3. After an LVI reset has been generated, do not write values to LVIS and LVIM when
4. When using LVI as an interrupt, if LVION is cleared (0) in a state below the LVI
This bit is cleared to 00H upon a reset other than an LVI reset.
Bit 0 is read-only.
LVION, LVIMD, and LVISEL are cleared to 0 in the case of a reset other than an LVI reset.
These are not cleared to 0 in the case of an LVI reset.
When LVION is set to 1, operation of the comparator in the LVI circuit is started. Use
software to wait for an operation stabilization time (10
until operation is stabilized. After operation has stabilized, 200
when a state below LVI detection voltage has been entered, until LVIF is set (1).
Disables operation
Enables operation
Detects level of supply voltage (V
Detects level of input voltage from external input pin (EXLVI)
• LVISEL = 0: Generates an internal interrupt signal when the supply voltage (V
• LVISEL = 1: Generates an interrupt signal when the input voltage from an external
• LVISEL = 0: Generates an internal reset signal when the supply voltage (V
• LVISEL = 1: Generates an internal reset signal when the input voltage from an
• LVISEL = 0: Supply voltage (V
• LVISEL = 1: Input voltage from external input pin (EXLVI) ≥ detection voltage (V
• LVISEL = 0: Supply voltage (V
• LVISEL = 1: Input voltage from external input pin (EXLVI) < detection voltage (V
Figure 24-2. Format of Low-Voltage Detection Register (LVIM)
• When using 8-bit memory manipulation instruction: Write 00H to LVIM.
• When using 1-bit memory manipulation instruction: Clear LVION to 0.
LVION = 1.
detection voltage, an INTLVI signal is generated and LVIIF becomes 1.
6
0
Note 1
Low-voltage detection operation mode (interrupt/reset) selection
CHAPTER 24 LOW-VOLTAGE DETECTOR
lower than the detection voltage (V
V
input pin (EXLVI) drops lower than the detection voltage (V
V
detection voltage (V
external input pin (EXLVI) < detection voltage (V
reset signal when EXLVI ≥ V
disabled
or when operation is disabled
LVI
EXLVI
5
0
R/W
or higher (V
) or when EXLVI becomes V
User’s Manual U17260EJ6V0UD
Note 2
Enables low-voltage detection operation
4
0
Voltage detection selection
DD
Low-voltage detection flag
DD
DD
DD
≥ V
) ≥ detection voltage (V
) < detection voltage (V
LVI
)
) and releases the reset signal when V
LVI
).
EXLVI
3
0
.
EXLVI
LVI
) (V
or higher (EXLVI ≥ V
LVISEL
DD
<2>
LVI
LVI
< V
µ
), or when operation is
)
s (MAX.)) from when LVION is set to 1
LVI
EXLVI
) or when V
LVIMD
) and releases the
<1>
µ
EXLVI
s (MIN.) are required from
EXLVI
DD
DD
DD
) (EXLVI <
becomes
).
≥ V
DD
) <
DD
.
LVIF
<0>
LVI
EXLVI
) drops
EXLVI
.
),
)