UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 238

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

(1) Measuring the pulse width by using two input signals of the TI00n and TI01n pins (free-running timer
238
A pulse width can be measured in the following three ways.
• Measuring the pulse width by using two input signals of the TI00n and TI01n pins (free-running timer mode)
• Measuring the pulse width by using one input signal of the TI00n pin (free-running timer mode)
• Measuring the pulse width by using one input signal of the TI00n pin (clear & start mode entered by the TI00n pin
Remarks 1. For the setting of the I/O pins, see 7.3 (5) Port mode register 0 (PM0).
mode)
Set the free-running timer mode (TMC0n3 and TMC0n2 = 01). When the valid edge of the TI00n pin is detected,
the count value of TM0n is captured to CR01n. When the valid edge of the TI01n pin is detected, the count value
of TM0n is captured to CR00n. Specify detection of both the edges of the TI00n and TI01n pins.
By this measurement method, the previous count value is subtracted from the count value captured by the edge
of each input signal. Therefore, save the previously captured value to a separate register in advance.
If an overflow occurs, the value becomes negative if the previously captured value is simply subtracted from the
current captured value and, therefore, a borrow occurs (bit 0 (CY) of the program status word (PSW) is set to 1).
If this happens, ignore CY and take the calculated value as the pulse width. In addition, clear bit 0 (OVF0n) of
16-bit timer mode control register 0n (TMC0n) to 0.
Remark n = 0:
valid edge input)
Capture trigger input
Capture trigger input
(TMC0n3, TMC0n2)
Capture interrupt
Capture interrupt
Capture register
Capture register
TM0n register
Operable bits
Overflow flag
(INTTM01n)
(INTTM00n)
2. For how to enable the INTTM00n signal interrupt, see CHAPTER 19 INTERRUPT FUNCTIONS.
n = 0, 1:
(OVF0n)
(CR01n)
(CR00n)
(TI00n)
(TI01n)
FFFFH
0000H
µ
µ
PD78F0531, 78F0532, 78F0533
PD78F0534, 78F0535, 78F0536, 78F0537, 78F0537D
Figure 7-53. Timing Example of Pulse Width Measurement (1)
0000H
0000H
00
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
A
• TMC0n = 04H, PRM0n = F0H, CRC0n = 05H
01
M
A
User’s Manual U17260EJ6V0UD
B
0 write clear
M
N
B
0 write clear
N
C
S
C
0 write clear
D
S
P
D
P
0 write clear
E
Q
E
Q