UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 311
UPD78F0537DGA(T)-9EV-A
Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet
1.UPD78F0535GBT-UEU-A.pdf
(773 pages)
Specifications of UPD78F0537DGA(T)-9EV-A
Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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12.4 Operations of Clock Output/Buzzer Output Controller
12.4.1 Operation as clock output
12.4.2 Operation as buzzer output
The clock pulse is output as the following procedure.
<1> Select the clock pulse output frequency with bits 0 to 3 (CCS0 to CCS3) of the clock output selection register
<2> Set bit 4 (CLOE) of CKS to 1 to enable clock output.
Remark
The buzzer frequency is output as the following procedure.
<1> Select the buzzer output frequency with bits 5 and 6 (BCS0, BCS1) of the clock output selection register
<2> Set bit 7 (BZOE) of CKS to 1 to enable buzzer output.
(CKS) (clock pulse output in disabled status).
(CKS) (buzzer output in disabled status).
Clock output
The clock output controller is designed not to output pulses with a small width during output
enable/disable switching of the clock output. As shown in Figure 12-4, be sure to start output from the
low period of the clock (marked with * in the figure). When stopping output, do so after the high-level
period of the clock.
CLOE
CHAPTER 12 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER
Figure 12-4. Remote Control Output Application Example
*
User’s Manual U17260EJ6V0UD
*
311
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