UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 40

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UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
2.2.9 P120 to P124 (port 12)
potential input for external low-voltage detection, connecting resonator for main system clock, connecting resonator
for subsystem clock, external clock input for main system clock, and external clock input for subsystem clock. The
following operation modes can be specified in 1-bit units.
(1) Port mode
(2) Control mode
40
P120 to P124 function as a 5-bit I/O port. These pins also function as pins for external interrupt request input,
(a) KR0 to KR7
P120 to P124 function as a 5-bit I/O port. P120 to P124 can be set to input or output port using port mode
register 12 (PM12). Only for P120, use of an on-chip pull-up resistor can be specified by pull-up resistor option
register 12 (PU12).
P120 to P124 function as pins for external interrupt request input, potential input for external low-voltage
detection, connecting resonator for main system clock, connecting resonator for subsystem clock, external clock
input for main system clock, and external clock input for subsystem clock.
(a) INTP0
(b) EXLVI
(c) X1, X2
(d) EXCLK
(e) XT1, XT2
(f) EXCLKS
These are the key interrupt input pins
This functions as an external interrupt request input (INTP0) for which the valid edge (rising edge, falling
edge, or both rising and falling edges) can be specified.
This is a potential input pin for external low-voltage detection.
These are the pins for connecting a resonator for main system clock.
This is an external clock input pin for main system clock.
These are the pins for connecting a resonator for subsystem clock.
This is an external clock input pin for subsystem clock.
Caution For products without an on-chip debug function and with the flash memory of 48 KB or
more (
or “E”, and for the product with an on-chip debug function (
P121/X1/OCD0A
programmer.
• P121/X1/OCD0A
The above connection is not necessary when writing the flash memory by means of self
programming.
µ
PD78F0534, 78F0535, 78F0536, and 78F0537) and having a product rank of “I”, “K”,
Note
Note
as follows when writing the flash memory with a flash memory
: When using this pin as a port, connect it to V
recommended) (in the input mode) or leave it open (in the output
mode).
CHAPTER 2 PIN FUNCTIONS
User’s Manual U17260EJ6V0UD
µ
SS
PD78F0537D), connect
via a resistor (10 kΩ:

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