UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 755

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

CHAPTER 27 ON-CHIP DEBUG FUNCTION (
p. 597
p. 599
CHAPTER 28 INSTRUCTION SET
p. 608
CHAPTER 29 ELECTRICAL SPECIFICATIONS (STANDARD PRODUCTS)
p. 613
p. 616
pp. 622, 623
p. 624
pp. 627 to 629 (2) Serial interface in AC Characteristics
CHAPTER 30 ELECTRICAL SPECIFICATIONS ((A) GRADE PRODUCTS)
p. 634
p. 637
pp. 641, 642
p. 643
pp. 646, 648
p. 653
Remark “Classification” in the above table classifies revisions as follows.
Page
(a): Error correction, (b): Addition/change of specifications, (c): Addition/change of description or note,
(d): Addition/change of package, part number, or management division, (e): Addition/change of related
documents
Revision of 27.1 Connecting QB-78K0MINI or QB-MINI2 to
Addition of 27.2 Reserved Area Used by QB-78K0MINI and QB-MINI2
Modification of the operation of CALLT instruction in 28.2 Operation List
Absolute Maximum Ratings
• Addition of REGC pin input voltage
• Addition of FLMD0 pin to condition of input voltage (V
Internal Oscillator Characteristics
• Modification of TYP. value of internal high-speed oscillation clock frequency (f
DC Characteristics
• Modification of A/D converter operating current (I
• Modification of Notes 1 and 2 of and addition of Note 4 to supply current
(1) Basic operation in AC Characteristics
• Addition of peripheral hardware clock frequency (f
• Modification of External main system clock input high-level width, low-level width (t
• Modification of External subsystem clock input high-level width, low-level width (t
• Addition of Note 2
• Revision of (c) IIC0 and (d) CSI1n (master mode, SCK1n... internal clock output)
• Modification of delay time from SCK1n↓ to SO1n output (t
• Modification of IIC0 serial transfer timing diagram
Absolute Maximum Ratings
• Addition of REGC pin input voltage
• Addition of FLMD0 pin to condition of input voltage (V
Internal Oscillator Characteristics
• Modification of TYP. value of internal high-speed oscillation clock frequency (f
DC Characteristics
• Modification of MAX. value of supply current in operating mode (I
• Modification of A/D converter operating current (I
• Modification of Notes 1 and 2 of and addition of Note 4 to supply current
(1) Basic operation in AC Characteristics
• Addition of peripheral hardware clock frequency (f
• Modification of External main system clock input high-level width, low-level width (t
• Modification of External subsystem clock input high-level width, low-level width (t
• Addition of Note 2
(2) Serial interface in AC Characteristics
• Revision of (c) IIC0
• Modification of IIC0 serial transfer timing diagram
Modification of number of rewrites per chip (C
Characteristics
SCK1n... external clock output)
during subsystem clock oscillation
APPENDIX E REVISION HISTORY
µ
PD78F0537D ONLY)
User’s Manual U17260EJ6V0UD
Description
erwr
) in Flash Memory Programming
ADC
ADC
PRS
PRS
)
)
)
)
I1
I1
)
)
KSO2
µ
PD78F0537D
) in (e) CSI1n (slave mode,
DD1
) and HALT mode (I
RH
RH
) when RSTS = 0
) when RSTS = 0
EXCLKSH
EXCLKSH
EXCLKH
EXCLKH
, t
, t
DD2
, t
, t
EXCLKSL
EXCLKSL
EXCLKL
EXCLKL
),
)
)
)
)
Classification
(c, d)
(b)
(b)
(b)
(b)
(b)
(b)
(b)
(b)
(b)
(b)
(b)
(c)
(c)
(4/5)
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