UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 431

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

(5) IIC function expansion register 0 (IICX0)
(6) I
This register sets the function expansion of I
IICX0 is set by a 1-bit or 8-bit memory manipulation instruction. The CLX0 bit is set in combination with bits 3,
1, and 0 (SMC0, CL01, and CL00) of IIC clock selection register 0 (IICCL0) (see 17.3 (6) I
setting method).
Set IICX0 while bit 7 (IICE0) of IIC control register 0 (IICC0) is 0.
Reset signal generation sets IICX0 to 00H.
The I
For example, the I
50 ns is calculated using following expression.
2
C transfer clock setting method
Address: FFA9H
Symbol
IICX0
2
f
f
C transfer clock frequency (f
SCL
SCL
m = 12, 18, 24, 44, 66, 86 (see Table 17-2 Selection Clock Setting)
T:
t
t
= 1/(m × T + t
R
F
= 1/(88 × 238.7 ns + 200 ns + 50 ns) ≅ 48.1 kHz
:
:
SCL0
1/f
SCL0 rise time
SCL0 fall time
SCL0
W
Figure 17-9. Format of IIC Function Expansion Register 0 (IICX0)
7
0
2
C transfer clock frequency (f
inversion
R
After reset: 00H
+ t
t
R
F
)
6
0
CHAPTER 17 SERIAL INTERFACE IIC0
SCL
) is calculated using the following expression.
m/2 × T
User’s Manual U17260EJ6V0UD
5
0
R/W
2
m × T + t
C.
SCL0
SCL
) when f
4
0
inversion
R
+ t
F
t
F
W
= f
3
0
m/2 × T
PRS
/2 = 4.19 MHz, m = 86, t
SCL0
2
0
inversion
1
0
R
2
= 200 ns, and t
C transfer clock
CLX0
<0>
431
F
=