UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 220

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

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7.4.5 Free-running timer operation
running timer mode), 16-bit timer/event counter 0n continues counting up in synchronization with the count clock.
When it has counted up to FFFFH, the overflow flag (OVF0n) is set to 1 at the next clock, and TM0n is cleared (to
0000H) and continues counting. Clear OVF0n to 0 by executing the CLR instruction via software.
(1) Free-running timer mode operation
220
When bits 3 and 2 (TMC0n3 and TMC0n2) of 16-bit timer mode control register 0n (TMC0n) are set to 01 (free-
The following three types of free-running timer operations are available.
• Both CR00n and CR01n are used as compare registers.
• One of CR00n or CR01n is used as a compare register and the other is used as a capture register.
• Both CR00n and CR01n are used as capture registers.
Remarks 1. For the setting of the I/O pins, see 7.3 (5) Port mode register 0 (PM0).
(CR00n: compare register, CR01n: compare register)
Remark n = 0:
Count clock
2. For how to enable the INTTM00n signal interrupt, see CHAPTER 19 INTERRUPT FUNCTIONS.
n = 0, 1:
TMC0n3, TMC0n2
Operable bits
µ
µ
PD78F0531, 78F0532, 78F0533
PD78F0534, 78F0535, 78F0536, 78F0537, 78F0537D
Figure 7-37. Block Diagram of Free-Running Timer Mode
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
(CR00n: Compare Register, CR01n: Compare Register)
Compare register
Timer counter
User’s Manual U17260EJ6V0UD
Match signal
(CR01n)
(TM0n)
Compare register
(CR00n)
Match signal
controller
Output
TO0n output
Interrupt signal
(INTTM00n)
Interrupt signal
(INTTM01n)
TO0n pin