UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 749

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UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
Low-
voltage
detector
Option
byte
Flash
memory
Function
When detecting
level of input
voltage from
external input pin
(EXLVI)
Cautions for low-
voltage detector
0082H, 0083H/
1082H, 1083H
0080H/1080H
0081H/1081H
0084H/1084H
0080H/1080H
0081H/1081H
IMS: Internal
memory size
switching
register,
IXS: internal
expansion RAM
size switching
register
Operation clock
Details of
Function
Input voltage from external input pin (EXLVI) must be EXLVI < V
In a system where the supply voltage (V
vicinity of the LVI detection voltage (V
how the low-voltage detector is used.
(1) When used as reset
(2) When used as interrupt
Be sure to set 00H to 0082H and 0083H (0082H/1082H and 0083H/1083H when
the boot swap function is used).
Set a value that is the same as that of 0080H to 1080H because 0080H and 1080H
are switched during the boot swap operation.
POCMODE can only be written by using a dedicated flash programmer. It cannot
be set during self-programming or boot swap operation during self-programming (at
this time, 1.59 V POC mode (default) is set). However, because the value of 1081H
is copied to 0081H during the boot swap operation, it is recommended to set a value
that is the same as that of 0081H to 1081H when the boot swap function is used.
Be sure to set 00H (disabling on-chip debug operation) to 0084H for products not
equipped with the on-chip debug function (
78F0534, 78F0535, 78F0536, and 78F0537). Also set 00H to 1084H because
0084H and 1084H are switched during the boot swap operation.
To use the on-chip debug function with a product equipped with the on-chip debug
function (
that of 0084H to 1084H because 0084H and 1084H are switched during the boot
swap operation.
The combination of WDCS2 = WDCS1 = WDCS0 = 0 and WINDOW1 = WINDOW0
= 0 is prohibited.
The watchdog timer continues its operation during self-programming and EEPROM
emulation of the flash memory. During processing, the interrupt acknowledge time
is delayed. Set the overflow time and window size taking this delay into
consideration.
If LSROSC = 0 (oscillation can be stopped by software), the count clock is not
supplied to the watchdog timer in the HALT and STOP modes, regardless of the
setting of bit 0 (LSRSTOP) of the internal oscillation mode register (RCM).
When 8-bit timer H1 operates with the internal low-speed oscillation clock, the count
clock is supplied to 8-bit timer H1 even in the HALT/STOP mode.
Be sure to clear bit 7 to 0.
Be sure to clear bits 7 to 1 to “0”.
Be sure to set each product to the values shown in Table 26-1 after a reset release. p. 569
Be sure to set each product to the values shown in Table 26-2 after a reset release. p. 571
To set the memory size, set IMS and then IXS. Set the memory size so that the
internal ROM and internal expansion RAM areas do not overlap.
Only the internal high-speed oscillation clock (f
Only the X1 clock (f
UART6 is used.
The system may be repeatedly reset and released from the reset status.
In this case, the time from release of reset to the start of the operation of the
microcontroller can be arbitrarily set by taking action (1) below.
Interrupt requests may be frequently generated. Take (b) of action (2) below.
µ
PD78F0537D), set 02H or 03H to 0084H. Set a value that is the same as
APPENDIX D LIST OF CAUTIONS
User’s Manual U17260EJ6V0UD
X
) or external main system clock (f
Cautions
LVI
), the operation is as follows depending on
DD
) fluctuates for a certain period in the
µ
PD78F0531, 78F0532, 78F0533,
RH
) can be used when CSI10 is used. p. 579
EXCLK
) can be used when
DD
.
p. 559
p. 561
p. 564
p. 564
p. 564
p. 565
p. 565
p. 566
p. 566
p. 566
p. 566
p. 567
pp. 569,
571
p. 579
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749

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