r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 1019

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

23.4.4
An H-UDI reset is executed by setting an H-UDI reset assert command in SDIR. An H-UDI reset
is of the same kind as a power-on reset. An H-UDI reset is released by setting an H-UDI reset
negate command. The required time between the H-UDI reset assert command and H-UDI reset
negate command is the same as time for keeping the RES pin low to apply a power-on reset.
Chip internal reset
23.4.5
The H-UDI interrupt function generates an interrupt by setting a command from the H-UDI in
SDIR. An H-UDI interrupt is a general exception/interrupt operation, resulting in fetching the
exception service routine start address from the exception handling vector table, jumping to that
address, and starting program execution from that address. This interrupt request has a fixed
priority level of 15.
H-UDI interrupts are accepted in sleep mode, but not in software standby mode.
(after execution of TDO change
CPU state
timing switch command)
SDIR
H-UDI Reset
H-UDI Interrupt
(initial value)
H-UDI reset assert
TCK
TDO
TDO
Figure 23.3 H-UDI Data Transfer Timing
Figure 23.4 H-UDI Reset
Section 23 High-Performance User Debugging Interface (H-UDI)
t
H-UDI reset negate
TDOD
Rev. 2.00 Dec. 09, 2005 Page 995 of 1152
Fetch the initial values of PC and SR from
the exception handling vector table
t
TDOD
REJ09B0191-0200