r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 705

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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0
12.3.7
POECR1 is an 8-bit readable/writable register that controls high-impedance state of the pins.
Bit
7 to 4
3
2
1
Bit Name
MTU2PE3ZE
MTU2PE2ZE
MTU2PE1ZE
Port Output Enable Control Register 1 (POECR1)
Note:
*
Initial value:
Initial
Value
All 0
0
0
0
Can be modified only once after a power-on reset.
R/W:
Bit:
R/W
R
R/W*
R/W*
R/W*
R
7
0
-
R
6
0
-
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
MTU2 PE3 High-Impedance Enable
Specifies whether to place the PE3/TIOC0D pin for
channel 0 in the MTU2 in high-impedance state when
either POE8F or MTU2CH0HIZ bit is set to 1.
0: Does not place the pin in high-impedance state
1: Places the pin in high-impedance state
MTU2 PE2 High-Impedance Enable
Specifies whether to place the PE2/TIOC0C pin for
channel 0 in the MTU2 in high-impedance state when
either POE8F or MTU2CH0HIZ bit is set to 1.
0: Does not place the pin in high-impedance state
1: Places the pin in high-impedance state
MTU2 PE1 High-Impedance Enable
Specifies whether to place the PE1/TIOC0B pin for
channel 0 in the MTU2 in high-impedance state when
either POE8F or MTU2CH0HIZ bit is set to 1.
0: Does not place the pin in high-impedance state
1: Places the pin in high-impedance state
R
5
0
-
R
4
0
-
PE3ZE
R/W* R/W* R/W* R/W*
MTU2
3
0
Rev. 2.00 Dec. 09, 2005 Page 681 of 1152
Section 12 Port Output Enable 2 (POE2)
PE2ZE
MTU2
2
0
PE1ZE
MTU2
1
0
PE0ZE
MTU2
0
0
REJ09B0191-0200

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