r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 239

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Note:
Bit
10, 9
8 to 0
*
Bit Name
BSZ[1:0]

CSnBCR samples the external pins (MD2 and MD0) that specify the bus width at
power-on reset.
Initial
Value
11*
All 0
R/W
R/W
R
Description
Data Bus Width Specification
Specify the data bus widths of spaces.
00: Reserved (setting prohibited)
01: 8-bit size
10: 16-bit size
11: 32-bit size
For MPX-I/O, selects bus width by address
Notes:
Reserved
These bits are always read as 0. The write value
should always be 0.
1. If area 5 is specified as MPX-I/O, the bus
2. The initial data bus width for areas 0 to 8
3. If area 6 is specified as burst MPX-I/O
4. If area 5 or area 6 is specified as PCMCIA
5. If area 2 or area 3 is specified as SDRAM
6. If area 0 is specified as clocked
width can be specified as 8 bits or 16 bits
by the address according to the SZSEL bit
in CS5WCR by specifying the BSZ[1:0]
bits to 11. The fixed bus width can be
specified as 8 bits or 16 bits
is specified by external pins. The BSZ[1:0]
bits settings in CS0BCR are ignored but
the bus width settings in CS1BCR to
CS8BCR can be modified.
space, the bus width can be specified as
32 bits only.
space, the bus width can be specified as
either 8 bits or 16 bits.
space, the bus width can be specified as
either 16 bits or 32 bits.
synchronous burst ROM space, the bus
width can be specified as either 16 bits or
32 bits.
Rev. 2.00 Dec. 09, 2005 Page 215 of 1152
Section 8 Bus State Controller (BSC)
REJ09B0191-0200