r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 1111

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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0
Figure 25.23 Synchronous DRAM Burst Read Bus Cycle (Four Read Cycles)
A12/A11
D31 to D0
A25 to A0
Notes: 1. An address pin to be connected to pin A10 of SDRAM.
RASU/L
CASU/L
(Auto Precharge, CAS Latency 2, WTRCD = 0 Cycle, WTRP = 1 Cycle)
DACKn
TENDn*
RD/WR
DQMxx
CKIO
CKE
CSn
BS
*
2. The waveform for DACKn and TENDn is when active low is specified.
1
2
t
t
t
AD1
t
t
AD1
RASD1
t
RWD1
t
DQMD1
DACD
CSD1
address
Tr
Row
t
t
AD1
t
t
t
AD1
RASD1
CASD1
BSD
Tc1
READ command
(High)
t
AD1
Tc2
Column
address
t
AD1
Td1
Tc3
t
RDS2
t
t
RDH2
t
AD1
AD1
command
Td2
(1 to 4)
Tc4
READA
Rev. 2.00 Dec. 09, 2005 Page 1087 of 1152
t
t
t
AD1
CASD1
BSD
Td3
Section 25 Electrical Characteristics
Td4
t
RDS2
t
t
t
DQMD1
RDH2
CSD1
t
DACD
Tde
t
t
AD1
RWD1
REJ09B0191-0200

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