r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 807

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 15 Serial Communication Interface with FIFO (SCIF)
15.6.6
Receive Data Sampling Timing and Receive Margin (Asynchronous Mode)
The SCIF operates on a base clock with a frequency of 16 times the transfer rate. In reception, the
SCIF synchronizes internally with the fall of the start bit, which it samples on the base clock.
Receive data is latched at the rising edge of the eighth base clock pulse. The timing is shown in
figure 15.19.
16 clocks
8 clocks
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
0
1
2
3
4
5
Base clock
–7.5 clocks
+7.5 clocks
Receive data
Start bit
D0
D1
(RxD)
Synchronization
sampling timing
Data sampling
timing
Figure 15.19 Receive Data Sampling Timing in Asynchronous Mode
Rev. 2.00 Dec. 09, 2005 Page 783 of 1152
REJ09B0191-0200