r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 840

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 16 I
Notes: Follow the steps below to receive only one byte with MST = 1 specified. See figure 16.16
Rev. 2.00 Dec. 09, 2005 Page 816 of 1152
REJ09B0191-0200
processing
ICDRR
ICDRS
RDRF
(Input)
MST
SCL
TRS
SDA
User
1. Set the ICE bit in ICCR1 to 1. Set bits CKS[3:0] in ICCR1. (Initial setting)
2. Set MST = 1 while the RCVD bit in ICCR1 is 0. This causes the receive clock to be
3. Check if the BC2 bit in ICMR is set to 1 and then set the RCVD bit in ICCR1 to 1.
for the operation timing.
output.
This causes the SCL to be fixed to the high level after outputting one byte of the
receive clock.
2
[2] Set MST
C Bus Interface 3 (IIC3)
(when outputting the clock)
Bit 0
1
Figure 16.15 Receive Mode Operation Timing
Data 1
Bit 1
2
Bit 6
7
[3] Read ICDRR
Bit 7
8
Bit 0
Data 2
1
Data 1
Bit 6
7
Bit 7
8
Bit 0
1
[3] Read ICDRR
Data 2
Data 3
Bit 1
2