r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 1149

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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0
[Legend]
I:
O:
H:
L:
Z:
K:
Notes: 1. Controlled by the HIZ bit in standby control register 3 (STBCR3) (see section 22,
I/O port
Type
Input
Output
High-level output
Low-level output
High-impedance
Input pins become high-impedance, and output pins retain their state.
2. Controlled by the HIZCNT bit in the common control register of the BSC (see section 8,
3. Controlled by the HIZMEM bit in the common control register of the BSC (see section 8,
4. Z when the TAP controller of the H-UDI is neither the Shift-DR nor Shift-IR state.
5. High-impedance control through POE2 (see section 12, Port Output Enable 2 (POE2)).
6. The EXTAL pin must be pulled up and the XTAL pin must be open.
7. Power-on reset by low-level input to the RES pin. The pin states after a power-on reset
Pin Function
PE16, PE15 to PE11*
PE10, PE9*
PE8 to PE0
PF7 to PF0
Power-Down Modes).
Bus State Controller (BSC)).
Bus State Controller (BSC)).
by the H-UDI reset assert command or WDT overflow are the same as the initial pin
states at normal operation (see section 19, Pin Function Controller (PFC)).
Pin Name
5
,
5
,
8 Bits
Area 0 Data Bus Width
Power-On*
16 Bits 32 Bits
Z
Z
Reset State
7
Rev. 2.00 Dec. 09, 2005 Page 1125 of 1152
Manual
Pin State
I/O
I
Software
Power-Down State
Standby
K/Z*
Z
1
Sleep
I/O
REJ09B0191-0200
I
Mastership
Release
Appendix
Bus
I/O
I

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