r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 691

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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0
12.3.1
ICSR1 is a 16-bit readable/writable register that selects the POE0 to POE3 pin input modes,
controls the enable/disable of interrupts, and indicates status.
Initial value:
Bit
15
Notes:
R/W:
Bit:
1.
2.
Bit Name
POE3F
Input Level Control/Status Register 1 (ICSR1)
R/(W)*
POE3F POE2F POE1F POE0F
Only 0 can be written to clear the flag after 1 is read.
Can be modified only once after a power-on reset.
15
0
1
R/(W)*
14
0
1
R/(W)*
Initial
Value
0
13
0
1
R/(W)*
12
0
1
R/W
R/(W)*
11
R
0
-
1
10
R
0
-
Description
POE3 Flag
Indicates that a high impedance request has been input
to the POE3 pin.
[Clearing conditions]
[Setting condition]
By writing 0 to POE3F after reading POE3F = 1
(when the falling edge is selected by bits 7 and 6 in
ICSR1)
By writing 0 to POE3F after reading POE3F = 1 after
a high level input to POE3 is sampled at Pφ/8, Pφ/16,
or Pφ/128 clock (when low-level sampling is selected
by bits 7 and 6 in ICSR1)
When the input set by bits 7 and 6 in ICSR1 occurs at
the POE3 pin
R
9
0
-
R/W R/W*
PIE1
8
0
POE3M[1:0]
7
0
2
Rev. 2.00 Dec. 09, 2005 Page 667 of 1152
R/W*
Section 12 Port Output Enable 2 (POE2)
6
0
2
R/W*
POE2M[1:0]
5
0
2
R/W*
4
0
2
R/W*
POE1M[1:0]
3
0
2
REJ09B0191-0200
R/W*
2
0
2
R/W*
POE0M[1:0]
1
0
2
R/W*
0
0
2

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