r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 781
r5s72060w200fpv
Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S72060W200FPV.pdf
(1180 pages)
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Bit
15 to 1
0
Bit Name
—
ORER
Initial
Value
All 0
0
R/W
R
R/(W)* Overrun Error
Section 15 Serial Communication Interface with FIFO (SCIF)
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Indicates the occurrence of an overrun error.
0: Receiving is in progress or has ended normally*
[Clearing conditions]
•
•
1: An overrun error has occurred*
[Setting condition]
•
Notes: 1. Clearing the RE bit to 0 in SCSCR does
ORER is cleared to 0 when the chip is a power-on
reset
ORER is cleared to 0 when 0 is written after 1 is
read from ORER.
ORER is set to 1 when the next serial receiving is
finished while the receive FIFO is full of 16-byte
receive data.
2. The receive FIFO data register (SCFRDR)
not affect the ORER bit, which retains its
previous value.
retains the data before an overrun error
has occurred, and the next received data
is discarded. When the ORER bit is set to
1, the SCIF cannot continue the next
serial reception.
Rev. 2.00 Dec. 09, 2005 Page 757 of 1152
2
REJ09B0191-0200
1
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