r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 54

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 2 CPU
2.1.2
The control registers consist of four 32-bit registers: the status register (SR), the global base
register (GBR), the vector base register (VBR), and the jump table base register (TBR).
The status register indicates instruction processing states.
The global base register functions as a base address for the GBR indirect addressing mode to
transfer data to the registers of on-chip peripheral modules.
The vector base register functions as the base address of the exception handling vector area
(including interrupts).
The jump table base register functions as the base address of the function table area.
(1)
Initial value:
Initial value:
Rev. 2.00 Dec. 09, 2005 Page 30 of 1152
REJ09B0191-0200
R/W:
R/W:
Status Register (SR)
Bit:
Bit:
Control Registers
31
15
R
R
0
0
-
-
R/W
31
31
31
31
BO
30
14
R
0
0
-
R/W
CS
29
13
R
0
0
-
14
BO
28
12
R
R
13
CS
0
0
-
-
Figure 2.2 Control Registers
9
M
GBR
VBR
TBR
27
11
R
R
0
0
-
-
Q
8
7
26
10
6
R
R
0
0
I[3:0]
-
-
5
4
R/W
25
R
M
0
9
-
-
3
2
R/W
1
S
24
R
0
8
Q
-
-
0
0
0
0
T
Status register (SR)
Global base register (GBR)
Vector base register (VBR)
Jump table base register (TBR)
R/W
23
R
0
7
1
-
R/W
22
R
0
6
1
-
I[3:0]
R/W
21
R
0
5
1
-
R/W
20
R
0
4
1
-
19
R
R
0
3
0
-
-
18
R
R
0
2
0
-
-
R/W
17
R
0
1
S
-
-
R/W
16
R
0
0
T
-
-