r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 228

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 8 Bus State Controller (BSC)
8.3
8.3.1
In the architecture, this LSI has a 32-bit address space, which is divided into cache-enabled, cache-
disabled, and on-chip spaces (on-chip RAM, on-chip peripheral modules, and reserved areas)
according to the upper bits of the address.
External address spaces CS0 to CS7 are cache-enabled when internal address A29 = 0 or cache-
disabled when A29 = 1. The CS8 space is always cache-disabled.
The kind of memory to be connected and the data bus width are specified in each partial space.
The address map for the external address space is listed below.
Table 8.2
Rev. 2.00 Dec. 09, 2005 Page 204 of 1152
REJ09B0191-0200
Internal Address
H'00000000 to H'03FFFFFF
H'04000000 to H'07FFFFFF
H'08000000 to H'0BFFFFFF CS2
H'0C000000 to H'0FFFFFFF CS3
H'10000000 to H'13FFFFFF
H'14000000 to H'17FFFFFF
H'18000000 to H'1BFFFFFF CS6
H'1C000000 to H'1FFFFFFF CS7
H'20000000 to H'23FFFFFF
H'24000000 to H'27FFFFFF
H'28000000 to H'2BFFFFFF CS2
H'2C000000 to H'2FFFFFFF CS3
H'30000000 to H'33FFFFFF
H'34000000 to H'37FFFFFF
H'38000000 to H'3BFFFFFF CS6
H'3C000000 to H'3FFFFFFF CS7
Area Overview
Address Map
Address Map
Space Memory to be Connected
CS0
CS1
CS4
CS5
CS0
CS1
CS4
CS5
Normal space, SRAM with byte selection,
burst ROM (asynchronous or synchronous)
Normal space, SRAM with byte selection
Normal space, SRAM with byte selection, SDRAM
Normal space, SRAM with byte selection, SDRAM
Normal space, SRAM with byte selection,
burst ROM (asynchronous)
Normal space, SRAM with byte selection, MPX-
I/O, PCMCIA
Normal space, SRAM with byte selection,
burst MPX-I/O, PCMCIA
Normal space, SRAM with byte selection
Normal space, SRAM with byte selection,
burst ROM (asynchronous or synchronous)
Normal space, SRAM with byte selection
Normal space, SRAM with byte selection, SDRAM
Normal space, SRAM with byte selection, SDRAM
Normal space, SRAM with byte selection,
burst ROM (asynchronous)
Normal space, SRAM with byte selection, MPX-
I/O, PCMCIA
Normal space, SRAM with byte selection,
burst MPX-I/O, PCMCIA
Normal space, SRAM with byte selection
Cache
Cache-enabled
Cache-disabled