r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 826
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r5s72060w200fpv
Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S72060W200FPV.pdf
(1180 pages)
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Section 16 I
16.3.8
ICDRR is an 8-bit register that stores the receive data. When data of one byte is received, ICDRR
transfers the receive data from ICDRS to ICDRR and the next data can be received. ICDRR is a
receive-only register, therefore the CPU cannot write to this register.
ICDRR is initialized to H'FF by a power-on reset.
16.3.9
ICDRS is a register that is used to transfer/receive data. In transmission, data is transferred from
ICDRT to ICDRS and the data is sent from the SDA pin. In reception, data is transferred from
ICDRS to ICDRR after data of one byte is received. This register cannot be read directly from the
CPU.
Rev. 2.00 Dec. 09, 2005 Page 802 of 1152
REJ09B0191-0200
I
I
2
2
2
C Bus Receive Data Register (ICDRR)
C Bus Shift Register (ICDRS)
C Bus Interface 3 (IIC3)
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
R
7
1
7
-
-
R
6
1
6
-
-
R
5
1
5
-
-
R
4
1
4
-
-
R
3
1
3
-
-
R
2
1
2
-
-
R
1
1
1
-
-
R
0
1
0
-
-
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