r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 279

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Bit
15, 14
13
12
Bit Name

DEEP
SLOW
Initial
Value
All 0
0
0
R/W
R
R/W
R/W
Deep Power-Down Mode
Low-Frequency Mode
Specifies the output timing of command, address, and
write data for SDRAM and the latch timing of read data
from SDRAM. Setting this bit makes the hold time for
command, address, write and read data extended for
half cycle (output or read at the falling edge of CKIO).
This mode is suitable for SDRAM with low-frequency
clock.
0: Command, address, and write data for SDRAM is
1: Command, address, and write data for SDRAM is
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
This bit is valid for low-power SDRAM. If the RFSH or
RMODE bit is set to 1 while this bit is set to 1, the deep
power-down entry command is issued and the low-
power SDRAM enters the deep power-down mode.
0: Self-refresh mode
1: Deep power-down mode
output at the rising edge of CKIO. Read data from
SDRAM is latched at the rising edge of CKIO.
output at the falling edge of CKIO. Read data from
SDRAM is latched at the falling edge of CKIO.
Rev. 2.00 Dec. 09, 2005 Page 255 of 1152
Section 8 Bus State Controller (BSC)
REJ09B0191-0200