r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 268

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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0
Section 8 Bus State Controller (BSC)
Note:
Rev. 2.00 Dec. 09, 2005 Page 244 of 1152
REJ09B0191-0200
Bit
1, 0
*
If both areas 2 and 3 are specified as SDRAM, WTRP[1:0], WTRCD[1:0], TRWL[1:0],
and WTRC[1:0] bit settings are used in both areas in common.
If only one area is connected to the SDRAM, specify area 3. In this case, specify area 2
as normal space or SRAM with byte selection.
Bit Name
WTRC[1:0]* 00
Initial
Value
R/W
R/W
Description
Number of Idle Cycles from REF Command/Self-
Refresh Release to ACTV/REF/MRS Command
Specify the number of minimum idle cycles in the
periods shown below.
The setting for areas 2 and 3 is common.
00: 2 cycles
01: 3 cycles
10: 5 cycles
11: 8 cycles
From the issuance of the REF command until the
issuance of the ACTV/REF/MRS command
From releasing self-refresh until the issuance of the
ACTV/REF/MRS command.

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