r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 698

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 12 Port Output Enable 2 (POE2)
Rev. 2.00 Dec. 09, 2005 Page 674 of 1152
REJ09B0191-0200
Bit
12
11 to 9 —
8
7, 6
Bit Name
POE7M[1:0] 00
POE4F
PIE2
Initial
Value
0
All 0
0
R/W
R/(W)*
R
R/W
R/W*
2
1
Description
POE4 Flag
Indicates that a high impedance request has been input
to the POE4 pin.
[Clearing conditions]
[Setting condition]
Reserved
These bits are always read as 0. The write value should
always be 0.
Port Interrupt Enable 2
Enables or disables interrupt requests when any one of
the POE4F to POE7F bits of the ICSR2 is set to 1.
0: Interrupt requests disabled
1: Interrupt requests enabled
POE7 Mode
These bits select the input mode of the POE7 pin.
00: Accept request on falling edge of POE7 input
01: Accept request when POE7 input has been sampled
10: Accept request when POE7 input has been sampled
11: Accept request when POE7 input has been sampled
By writing 0 to POE4F after reading POE4F = 1
(when the falling edge is selected by bits 1 and 0 in
ICSR2)
By writing 0 to POE4F after reading POE4F = 1 after
a high level input to POE4 is sampled at Pφ/8, Pφ/16,
or Pφ/128 clock (when low-level sampling is selected
by bits 1 and 0 in ICSR2)
When the input condition set by bits 1 and 0 in ICSR2
occurs at the POE4 pin
for 16 Pφ/8 clock pulses and all are at a low level.
for 16 Pφ/16 clock pulses and all are at a low level.
for 16 Pφ/128 clock pulses and all are at a low level.

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