r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 349

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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0
Note:
Bus Width
32 bits
(Bus Width = 32 Bits, 16-Byte Transfer (Number of Burst 4), Wait Cycles Inserted in First
Access = 2, Wait Cycles Inserted in Second and Subsequent Access Cycles = 1)
*
D31 to D0
A25 to A0
DACKn*
When the bus width is 16 bits, the access size is 16 bits, and the BST[1:0] bits in
CSnWCR are 10, the number of bursts and access count depend on the access start
address. At address H'xxx0 or H'xxx8, 4-4 burst access is performed. At address H'xxx4
or H'xxxC, 2-4-2 burst access is performed.
RD/WR
WAIT
CKIO
Figure 8.36 Burst ROM Access Timing (Clocked Asynchronous)
CSn
Access Size
8 bits
16 bits
32 bits
16 bytes
RD
BS
Note: * The waveform for DACKn is when active low is specified.
T1
Tw
CSnWCR. BST[1:0] Bits Number of Bursts Access Count
Not affected
Not affected
Not affected
Not affected
Tw
TB2
Twb
TB2
1
1
1
4
Rev. 2.00 Dec. 09, 2005 Page 325 of 1152
Twb
Section 8 Bus State Controller (BSC)
TB2
Twb
T2
1
1
1
1
REJ09B0191-0200

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