r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 782

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 15 Serial Communication Interface with FIFO (SCIF)
15.4
15.4.1
For serial communication, the SCIF has an asynchronous mode in which characters are
synchronized individually, and a clocked synchronous mode in which communication is
synchronized with clock pulses.
The SCIF has a 16-stage FIFO buffer for both transmission and receptions, reducing the overhead
of the CPU, and enabling continuous high-speed communication. Furthermore, channel 3 has RTS
and CTS signals to be used as modem control signals.
The transmission format is selected in the serial mode register (SCSMR), as shown in table 15.9.
The SCIF clock source is selected by the combination of the CKE[1:0] bits in the serial control
register (SCSCR), as shown in table 15.10.
(1)
• Data length is selectable: 7 or 8 bits
• Parity bit is selectable. So is the stop bit length (1 or 2 bits). The combination of the preceding
• In receiving, it is possible to detect framing errors, parity errors, receive FIFO data full,
• The number of stored data bytes is indicated for both the transmit and receive FIFO registers.
• An internal or external clock can be selected as the SCIF clock source.
(2)
• The transmission/reception format has a fixed 8-bit data length.
• In receiving, it is possible to detect overrun errors (ORER).
• An internal or external clock can be selected as the SCIF clock source.
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selections constitutes the communication format and character length.
overrun errors, receive data ready, and breaks.
 When an internal clock is selected, the SCIF operates using the clock of on-chip baud rate
 When an external clock is selected, the external clock input must have a frequency 16 times
 When an internal clock is selected, the SCIF operates using the clock of the on-chip baud
 When an external clock is selected, the SCIF operates on the input external synchronous
Asynchronous Mode
Clocked Synchronous Mode
generator.
the bit rate. (The on-chip baud rate generator is not used.)
rate generator, and outputs this clock to external devices as the synchronous clock.
clock not using the on-chip baud rate generator.
Operation
Overview