r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 232

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 8 Bus State Controller (BSC)
8.4.1
CMNCR is a 32-bit register that controls the common items for each area. This register is
initialized to H'00001010 by a power-on reset and retains the value by a manual reset and in
software standby mode.
Initial value:
Initial value:
Rev. 2.00 Dec. 09, 2005 Page 208 of 1152
REJ09B0191-0200
Bit
31 to 13
12
11
10, 9
R/W:
R/W:
Bit:
Bit:
Common Control Register (CMNCR)
Bit Name


BLOCK
DPRTY[1:0]
31
15
R
R
0
0
-
-
30
14
R
R
0
0
-
-
29
13
R
R
0
0
-
-
Initial
Value
All 0
1
0
00
28
12
R
R
0
1
-
-
BLOCK
R/W
27
11
R
0
0
R/W
R
R
R/W
R/W
-
R/W
DPRTY[1:0]
26
10
R
0
0
-
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Reserved
This bit is always read as 1. The write value should
always be 1.
Bus Lock
Specifies whether or not the BREQ signal is received.
0: Receives BREQ.
1: Does not receive BREQ.
DMA Burst Transfer Priority
Specify the priority for a refresh request/bus
mastership request during DMA burst transfer.
00: Accepts a refresh request and bus mastership
01: Accepts a refresh request but does not accept a
10: Accepts neither a refresh request nor a bus
11: Reserved (setting prohibited)
R/W
25
R
0
9
0
-
request during DMA burst transfer.
bus mastership request during DMA burst transfer.
mastership request during DMA burst transfer.
R/W
24
R
0
8
0
-
DMAIW[2:0]
R/W
23
R
0
7
0
-
R/W
22
R
0
6
0
-
R/W
DMA
IWA
21
R
0
5
0
-
20
R
R
0
4
1
-
-
19
R
R
0
3
0
-
-
18
R
R
0
2
0
-
-
MEM
R/W
HIZ
17
R
0
1
0
-
R/W
CNT
HIZ
16
R
0
0
0
-