r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 539

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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0
(1)
Figure 10.25 shows an example of the PWM mode setting procedure.
(2)
Figure 10.26 shows an example of PWM mode 1 operation.
In this example, TGRA compare match is set as the TCNT clearing source, 0 is set for the TGRA
initial output value and output value, and 1 is set as the TGRB output value.
In this case, the value set in TGRA is used as the period, and the values set in the TGRB registers
are used as the duty levels.
Example of PWM Mode Setting Procedure
Examples of PWM Mode Operation
Select counter clearing
Select counter clock
Select waveform
Figure 10.25 Example of PWM Mode Setting Procedure
Set PWM mode
<PWM mode>
PWM mode
output level
Start count
Set TGR
source
[1]
[2]
[3]
[4]
[5]
[6]
[1] Select the counter clock with bits TPSC2 to
[2] Use bits CCLR2 to CCLR0 in TCR to select
[3] Use TIOR to designate the TGR as an output
[4] Set the cycle in the TGR selected in [2], and
[5] Select the PWM mode with bits MD3 to MD0
[6] Set the CST bit in TSTR to 1 to start the
TPSC0 in TCR. At the same time, select the
input clock edge with bits CKEG1 and
CKEG0 in TCR.
the TGR to be used as the TCNT clearing
source.
compare register, and select the initial value
and output value.
set the duty in the other TGR.
in TMDR.
count operation.
Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
Rev. 2.00 Dec. 09, 2005 Page 515 of 1152
REJ09B0191-0200

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