r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 635

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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0
10.7.9
If an input capture signal is generated in the T1 state of a TGR read cycle, the data that is read will
be the data in the buffer before input capture transfer for channels 0 to 4, and the data after input
capture transfer for channel 5.
Figures 10.124 and 125 show the timing in this case.
Figure 10.124 Contention between TGR Read and Input Capture (Channels 0 to 4)
Figure 10.125 Contention between TGR Read and Input Capture (Channel 5)
Contention between TGR Read and Input Capture
Address
Read signal
Input capture
signal
TGR
Internal data
bus
Address
Read signal
Input capture
signal
TGR
Internal data
bus
N
N
TGR read cycle
TGR read cycle
T1
T1
TGR address
TGR address
Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
T2
T2
M
M
N
M
Rev. 2.00 Dec. 09, 2005 Page 611 of 1152
REJ09B0191-0200

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