r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 780

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 15 Serial Communication Interface with FIFO (SCIF)
15.3.12 Line Status Register (SCLSR)
The CPU can always read or write to SCLSR, but cannot write 1 to the ORER flag. This flag can
be cleared to 0 only if it has first been read (after being set to 1).
SCLSR is initialized to H'0000 by a power-on reset.
Initial value:
Rev. 2.00 Dec. 09, 2005 Page 756 of 1152
REJ09B0191-0200
Bit
1
0
Note:
R/W:
Bit:
*
Only 0 can be written to clear the flag after 1 is read.
Bit Name
SPB2IO
SPB2DT
15
R
0
-
14
R
0
-
13
R
0
-
Initial
Value
0
0
12
R
0
-
11
R
0
-
R/W
R/W
R/W
10
R
0
-
Description
Serial Port Break Input/Output
Indicates input or output of the serial port TxD pin.
When the TxD pin is actually used as a port outputting
the SPB2DT bit value, the TE bit in SCSCR should be
cleared to 0.
0: SPB2DT bit value not output to TxD pin
1: SPB2DT bit value output to TxD pin
Serial Port Break Data
Indicates the input data of the RxD pin and the output
data of the TxD pin used as serial ports. Input/output is
specified by the SPB2IO bit. When the TxD pin is set to
output, the SPB2DT bit value is output to the TxD pin.
The RxD pin status is read from the SPB2DT bit
regardless of the SPB2IO bit setting. However, RxD
input and TxD output must be set in the PFC.
0: Input/output data is low level
1: Input/output data is high level
R
9
0
-
R
8
0
-
R
7
0
-
R
6
0
-
R
5
0
-
R
4
0
-
R
3
0
-
R
2
0
-
R
1
0
-
R/(W)*
ORER
0
0