r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 511

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

10.3.27 Timer Cycle Buffer Register (TCBR)
TCBR is a 16-bit register used only in complementary PWM mode. It functions as a buffer
register for the TCDR register. The TCBR register values are transferred to the TCDR register
with the transfer timing set in the TMDR register.
10.3.28 Timer Interrupt Skipping Set Register (TITCR)
TITCR is an 8-bit readable/writable register that enables or disables interrupt skipping and
specifies the interrupt skipping count. The MTU2 has one TITCR.
Initial value:
Bit
7
6 to 4
3
Note:
R/W:
Bit:
Accessing the TCBR in 8-bit units is prohibited. Always access in 16-bit units.
Bit Name
T3AEN
3ACOR[2:0] 000
T4VEN
R/W
15
1
R/W
14
1
R/W
13
Initial value:
1
Initial
value
0
0
R/W
R/W:
12
1
Bit:
T3AEN
R/W
R/W
11
1
7
0
R/W
R/W
R/W
R/W
R/W
R/W
10
1
6
0
3ACOR[2:0]
Description
T3AEN
Enables or disables TGIA_3 interrupt skipping.
0: TGIA_3 interrupt skipping disabled
1: TGIA_3 interrupt skipping enabled
These bits specify the TGIA_3 interrupt skipping count
within the range from 0 to 7.*
For details, see table 10.40.
T4VEN
Enables or disables TCIV_4 interrupt skipping.
0: TCIV_4 interrupt skipping disabled
1: TCIV_4 interrupt skipping enabled
R/W
R/W
9
1
5
0
R/W
R/W
8
1
4
0
Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
T4VEN
R/W
R/W
7
1
3
0
Rev. 2.00 Dec. 09, 2005 Page 487 of 1152
R/W
R/W
6
1
2
0
4VCOR[2:0]
R/W
R/W
5
1
1
0
R/W
R/W
4
1
0
0
R/W
3
1
REJ09B0191-0200
R/W
2
1
R/W
1
1
R/W
0
1