r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 830
r5s72060w200fpv
Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S72060W200FPV.pdf
(1180 pages)
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Section 16 I
Rev. 2.00 Dec. 09, 2005 Page 806 of 1152
REJ09B0191-0200
(Master output)
(Master output)
(Slave output)
(Master output)
(Master output)
processing
(Slave output)
ICDRS
ICDRT
TDRE
TEND
processing
User
SDA
SDA
SCL
ICDRS
ICDRT
SCL
SDA
SDA
TDRE
TEND
User
[2] Instruction of start
2
C Bus Interface 3 (IIC3)
condition issuance
[5] Write data to ICDRT
Figure 16.5 Master Transmit Mode Operation Timing (1)
Figure 16.6 Master Transmit Mode Operation Timing (2)
9
A
Bit 7
1
Bit 7
[3] Write data to ICDRT (first byte)
1
Bit 6
2
Bit 6
2
Address + R/W
Bit 5
3
Address + R/W
Slave address
Bit 5
3
Data n
Bit 4
4
Data n
Bit 4
4
Bit 3
5
Bit 3
5
Bit 2
6
[4] Write data to ICDRT (second byte)
Bit 2
6
Bit 1
7
[6] Issue stop condition. Clear TEND.
Bit 1
7
R/W
Bit 0
8
Bit 0
8
[5] Write data to ICDRT (third byte)
A
9
[7] Set slave receive mode
A/A
9
Data 1
Data 1
Bit 7
1
Bit 6
Data 2
2
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