r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 56

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 2 CPU
2.1.3
The system registers consist of four 32-bit registers: the high and low multiply and accumulate
registers (MACH and MACL), the procedure register (PR), and the program counter (PC). MACH
and MACL store the results of multiply or multiply and accumulate operations. PR stores the
return address from a subroutine procedure. PC indicates the program address being executed and
controls the flow of the processing.
(1)
MACH and MACL are used as the addition value in a MAC instruction, and store the result of a
MAC or MUL instruction.
(2)
PR stores the return address of a subroutine call using a BSR, BSRF, or JSR instruction, and is
referenced by a subroutine return instruction (RTS).
(3)
PC indicates the address of the instruction being executed.
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REJ09B0191-0200
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Multiply and Accumulate Register High (MACH) and Multiply and Accumulate
Register Low (MACL)
Procedure Register (PR)
Program Counter (PC)
System Registers
MACH
MACL
PR
PC
Figure 2.3 System Registers
0
0
0
Multiply and accumulate register high (MACH) and multiply
and accumulate register low (MACL):
Store the results of multiply or multiply and accumulate operations.
Procedure register (PR):
Stores the return address from a subroutine procedure.
Program counter (PC):
Indicates the four bytes ahead of the current instruction.