r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 566

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
(i)
In complementary PWM mode, the initial output is determined by the setting of bits OLSN and
OLSP in timer output control register 1 (TOCR1) or bits OLS1N to OLS3N and OLS1P to OLS3P
in timer output control register 2 (TOCR2).
This initial output is the PWM pulse non-active level, and is output from when complementary
PWM mode is set with the timer mode register (TMDR) until TCNT_4 exceeds the value set in
the dead time register (TDDR). Figure 10.44 shows an example of the initial output in
complementary PWM mode.
An example of the waveform when the initial PWM duty value is smaller than the TDDR value is
shown in figure 10.45.
Rev. 2.00 Dec. 09, 2005 Page 542 of 1152
REJ09B0191-0200
Negative phase
Positive phase
Initial Output in Complementary PWM Mode
output
output
Figure 10.44 Example of Initial Output in Complementary PWM Mode (1)
Timer output control register settings
OLSN bit: 0 (initial output: high; active level: low)
OLSP bit: 0 (initial output: high; active level: low)
Complementary
PWM mode
(TMDR setting)
Initial output
TGRA_4
TCNT_3, 4 value
TDDR
TCNT_3, 4 count start
(TSTR setting)
Active level
Dead time
TCNT_3
TCNT_4
Active level
Time