PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 153

• Manufacturer Part Number: PIC18F97J60-I/PF
• Description: IC PIC MCU FLASH 65KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F97J60-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 10-13: PORTF FUNCTIONS
TABLE 10-14: SUMMARY OF REGISTERS ASSOCIATED WITH PORTF
© 2006 Microchip Technology Inc.
RF0/AN5
RF1/AN6/
C2OUT
RF2/AN7/
C1OUT
RF3/AN8
RF4/AN9
RF5/AN10/
CV
RF6/AN11
RF7/SS1
Legend:
Note 1:
PORTF
LATF
TRISF
ADCON1
CMCON
CVRCON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTF.
Note 1:
Pin Name
REF
Name
(1)
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Implemented on 100-pin devices only.
Implemented on 100-pin devices only.
Function
C2OUT
C1OUT
CV
RF0
AN5
AN10
AN11
AN6
AN7
AN8
AN9
RF1
RF2
RF3
RF4
RF5
RF6
RF7
SS1
TRISF7
C2OUT
CVREN
LATF7
REF
Bit 7
RF7
(1)
(1)
—
Setting
TRIS
0
1
1
0
1
1
0
0
1
1
0
0
1
1
0
1
1
0
1
1
x
0
1
1
0
1
1
CVROE
TRISF6
C1OUT
LATF6
Bit 6
RF6
—
I/O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
TRISF5
VCFG1
LATF5
C2INV
Type
CVRR
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
DIG
DIG
DIG
DIG
TTL
DIG
DIG
DIG
DIG
DIG
TTL
Bit 5
I/O
ST
ST
ST
ST
ST
ST
ST
ST
RF5
LATF<0> data output; not affected by analog input.
PORTF<0> data input; disabled when analog input enabled.
A/D input channel 5. Default configuration on POR.
LATF<1> data output; not affected by analog input.
PORTF<1> data input; disabled when analog input enabled.
A/D input channel 6. Default configuration on POR.
Comparator 2 output; takes priority over port data.
LATF<2> data output; not affected by analog input.
PORTF<2> data input; disabled when analog input enabled.
A/D input channel 7. Default configuration on POR.
Comparator 1 output; takes priority over port data.
LATF<3> data output; not affected by analog input.
PORTF<3> data input; disabled when analog input enabled.
A/D input channel 8 and comparator C2+ input. Default input configuration on
POR; not affected by analog output.
LATF<4> data output; not affected by analog input.
PORTF<4> data input; disabled when analog input enabled.
A/D input channel 9 and comparator C2- input. Default input configuration on
POR; does not affect digital output.
LATF<5> data output; not affected by analog input. Disabled when CV
output enabled.
PORTF<5> data input; disabled when analog input enabled. Disabled when
CV
A/D input channel 10 and comparator C1+ input. Default input configuration on POR.
Comparator voltage reference output. Enabling this feature disables digital I/O.
LATF<6> data output; not affected by analog input.
PORTF<6> data input; disabled when analog input enabled.
A/D input channel 11 and comparator C1- input. Default input configuration on
POR; does not affect digital output.
LATF<7> data output.
PORTF<7> data input.
Slave select input for MSSP1 module.
REF
TRISF4
VCFG0
CVRSS
LATF4
C1INV
Preliminary
Bit 4
RF4
output enabled.
TRISF3
PCFG3
PIC18F97J60 FAMILY
LATF3
CVR3
Bit 3
RF3
CIS
TRISF2
PCFG2
LATF2
CVR2
Bit 2
CM2
RF2
Description
TRISF1
PCFG1
LATF1
CVR1
Bit 1
CM1
RF1
TRISF0
LATF0
PCFG0
RF0
CVR0
Bit 0
CM0
DS39762B-page 151
(1)
(1)
(1)
on Page:
REF
Values
Reset
62
62
61
60
60
60