PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 446

IC PIC MCU FLASH 65KX16 100TQFP

PIC18F97J60-I/PF

Manufacturer Part Number
PIC18F97J60-I/PF
Description
IC PIC MCU FLASH 65KX16 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F97J60-I/PF

Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
100-TQFP, 100-VQFP
Core Processor
PIC
Core Size
8-Bit
Speed
41.667MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
70
Ram Size
3808 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3808 B
Interface Type
Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
41.667 MHz
Number Of Programmable I/os
70
Number Of Timers
5
Operating Supply Voltage
2.35 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Package
100TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
41.667 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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PIC18F97J60 FAMILY
TABLE 27-26: A/D CONVERTER CHARACTERISTICS: PIC18F97J60 FAMILY (INDUSTRIAL)
FIGURE 27-21:
DS39762B-page 444
Param
A01
A03
A04
A06
A07
A10
A20
A21
A22
A25
A30
A50
Note 1:
No.
Note 1:
A/D CLK
A/D DATA
SAMPLE
2:
ADRES
N
E
E
E
E
V
V
V
V
Z
I
BSF ADCON0, GO
REF
Symbol
ADIF
V
AIN
AIN
IL
DL
OFF
GN
REFSUM
REFH
REFL
R
2:
GO
REF
Q4
The A/D conversion result never decreases with an increase in the input voltage and has no missing
codes.
V
V
(1)
REFH
REFL
If the A/D clock source is selected as RC, a time of T
to be executed.
This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
current is from RA2/AN2/V
132
current is from RA3/AN3/V
Resolution
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Monotonicity
Reference Voltage Range
(V
Reference Voltage Sum
(V
Reference Voltage High
Reference Voltage Low
Analog Input Voltage
Recommended Impedance of
Analog Voltage Source
V
REF
REFH
REFH
A/D CONVERSION TIMING
Input Current
Characteristic
– V
+ V
REFL
REFL
(Note 2)
)
)
9
(2)
8
REF
REF
OLD_DATA
- pin or AV
7
+ pin or AV
Preliminary
V
V
AV
. . .
SAMPLING STOPPED
Min
1.8
REFL
REFL
CY
3
SS
is added before the A/D clock starts. This allows the SLEEP instruction
SS
DD
. . .
Guaranteed
, whichever is selected as the V
131
130
, whichever is selected as the V
Typ
2
(1)
AV
1
V
V
DD
AV
1000
Max
<±1
<±1
<±3
<±3
REFH
REFH
2.5
10
5
DD
+ 0.5
0
© 2006 Microchip Technology Inc.
Units
LSb
LSb
LSb
LSb
k
bit
V
V
V
V
V
V
A
A
REFL
REFH
V
V
V
During V
During A/D conversion
cycle.
NEW_DATA
DONE
V
V
V
V
V
SS
DD
DD
REF
REF
REF
REF
REF
source.
source.
Conditions
V
3.0V
3.0V
T
CY
AIN
AIN
2.0V
2.0V
2.0V
2.0V
2.0V
acquisition.
V
REF

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