PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 184

• Manufacturer Part Number: PIC18F97J60-I/PF
• Description: IC PIC MCU FLASH 65KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F97J60-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F97J60 FAMILY
16.1
Each Capture/Compare/PWM module is associated
with a control register (generically, CCPxCON) and a
data register (CCPRx). The data register, in turn, is
comprised of two 8-bit registers: CCPRxL (low byte)
and CCPRxH (high byte). All registers are both
readable and writable.
16.1.1
The CCPx/ECCPx modules utilize Timers 1, 2, 3 or 4,
depending on the mode selected. Timer1 and Timer3
are available to modules in Capture or Compare
modes, while Timer2 and Timer4 are available for
modules in PWM mode.
TABLE 16-1:
FIGURE 16-1:
DS39762B-page 182
Timer1 is used for all Capture
and Compare operations for
all CCPx modules. Timer2 is
used for PWM operations for
all CCPx modules. Modules
may
resource as a common time
base.
Timer3 and Timer4 are not
available.
CCPx/ECCPx Mode
ECCP1
ECCP2
ECCP3
TMR1
CCP4
CCP5
TMR2
T3CCP<2:1> = 00
Compare
share
Capture
CCPx Module Configuration
PWM
CCPx/ECCPx MODULES AND
TIMER RESOURCES
either
CCPx/ECCPx MODE – TIMER
RESOURCE
TMR3
TMR4
CCPx/ECCPx AND TIMER INTERCONNECT CONFIGURATIONS
timer
Timer1 and Timer2 are used
for Capture and Compare or
PWM operations for ECCP1
only (depending on selected
mode).
All other modules use either
Timer3 or Timer4. Modules
may
resource as a common time
base
Capture/Compare or PWM
modes.
Timer Resource
Timer1 or Timer3
Timer1 or Timer3
Timer2 or Timer4
ECCP1
TMR1
TMR2
T3CCP<2:1> = 01
share
if
they
either
ECCP2
ECCP3
TMR3
TMR4
CCP4
CCP5
are
Preliminary
timer
in
Timer1 and Timer2 are used
for Capture and Compare or
PWM operations for ECCP1
and ECCP2 only (depending
on the mode selected for each
module). Both modules may
use a timer as a common time
base if they are both in
Capture/Compare or PWM
modes.
The other modules use either
Timer3 or Timer4. Modules
may
resource as a common time
base
Capture/Compare or PWM
modes.
The assignment of a particular timer to a module is
determined by the timer to CCPx enable bits in the
T3CON register (Register 14-1, page 175). Depending
on the configuration selected, up to four timers may be
active at once, with modules in the same configuration
(Capture/Compare or PWM) sharing timer resources.
The possible configurations are shown in Figure 16-1.
16.1.2
The pin assignment for ECCP2 (Capture input,
Compare and PWM output) can change based on
device configuration. The CCP2MX Configuration bit
determines which pin ECCP2 is multiplexed to. By
default, it is assigned to RC1 (CCP2MX = 1). If the
Configuration bit is cleared, ECCP2 is multiplexed with
RE7 on 80-pin and 100-pin devices in Microcontroller
mode and RB3 on 100-pin devices in Extended
Microcontroller mode.
Changing the pin assignment of ECCP2 does not auto-
matically change any requirements for configuring the
port pin. Users must always verify that the appropriate
TRIS register is configured correctly for ECCP2
operation regardless of where it is located.
ECCP1
ECCP2
TMR1
TMR2
T3CCP<2:1> = 10
share
if
they
either
ECCP2 PIN ASSIGNMENT
ECCP3
TMR3
TMR4
CCP4
CCP5
are
timer
in
© 2006 Microchip Technology Inc.
Timer3 is used for all Capture
and Compare operations for
all CCPx modules. Timer4 is
used for PWM operations for
all CCPx modules. Modules
may
resource as a common time
base.
Timer1 and Timer2 are not
available.
TMR1
TMR2
T3CCP<2:1> = 11
share
either
ECCP1
ECCP2
ECCP3
TMR3
CCP4
CCP5
TMR4
timer