PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 465

• Manufacturer Part Number: PIC18F97J60-I/PF
• Description: IC PIC MCU FLASH 65KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F97J60-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

© 2006 Microchip Technology Inc.
CONFIG2H (Configuration 2 High) .......................... 347
CONFIG2L (Configuration 2 Low) ............................ 346
CONFIG3H (Configuration 3 High) .......................... 349
CONFIG3L (Configuration 3 Low) ...................... 69, 348
CVRCON (Comparator Voltage
DEVID1 (Device ID 1) .............................................. 350
DEVID2 (Device ID 2) .............................................. 350
ECCPxAS (ECCPx Auto-Shutdown
ECCPxDEL (ECCPx Dead-Band Delay) .................. 200
ECON1 (Ethernet Control 1) .................................... 212
ECON2 (Ethernet Control 2) .................................... 213
EECON1 (EEPROM Control 1) .................................. 97
EFLOCON (Ethernet Flow Control) ......................... 243
EIE (Ethernet Interrupt Enable) ................................ 225
EIR (Ethernet Interrupt Request, Flag) .................... 226
ERXFCON (Ethernet Receive
ESTAT (Ethernet Status) ......................................... 213
INTCON (Interrupt Control) ...................................... 121
INTCON2 (Interrupt Control 2) ................................. 122
INTCON3 (Interrupt Control 3) ................................. 123
IPR1 (Peripheral Interrupt Priority 1) ........................ 130
IPR2 (Peripheral Interrupt Priority 2) ........................ 131
IPR3 (Peripheral Interrupt Priority 3) ........................ 132
MABBIPG (MAC Back-to-Back
MACON1 (MAC Control 1) ....................................... 214
MACON3 (MAC Control 3) ....................................... 215
MACON4 (MAC Control 4) ....................................... 216
MEMCON (External Memory Bus Control) .............. 106
MICMD (MII Command) ........................................... 216
MISTAT (MII Status) ................................................ 217
OSCCON (Oscillator Control) .................................... 43
OSCTUNE (PLL Block Control) ................................. 41
PHCON1 (PHY Control 1) ........................................ 220
PHCON2 (PHY Control 2) ........................................ 221
PHIE (PHY Interrupt Enable) ................................... 227
PHIR (PHY Interrupt Request, Flag) ........................ 227
PHLCON (PHY Module LED Control) ...................... 223
PHSTAT1 (Physical Layer Status 1) ........................ 220
PHSTAT2 (Physical Layer Status 2) ........................ 222
PIE1 (Peripheral Interrupt Enable 1) ........................ 127
PIE2 (Peripheral Interrupt Enable 2) ........................ 128
PIE3 (Peripheral Interrupt Enable 3) ........................ 129
PIR1 (Peripheral Interrupt
PIR2 (Peripheral Interrupt
PIR3 (Peripheral Interrupt
PSPCON (Parallel Slave Port Control) .................... 160
RCON (Reset Control) ....................................... 54, 133
RCSTAx (Receive Status and Control x) ................. 301
SSPxCON1 (MSSPx Control 1, I
SSPxCON1 (MSSPx Control 1, SPI Mode) ............. 255
SSPxCON2 (MSSPx Control 2,
SSPxCON2 (MSSPx Control 2,
SSPxSTAT (MSSPx Status, I
SSPxSTAT (MSSPx Status, SPI Mode) .................. 254
Reference Control) .......................................... 339
Configuration) .................................................. 201
Filter Control) ................................................... 245
Inter-Packet Gap) ............................................ 231
Request (Flag) 1) ............................................. 124
Request (Flag) 2) ............................................. 125
Request (Flag) 3) ............................................. 126
I
I
2
2
C Master Mode) ............................................ 266
C Slave Mode) .............................................. 267
2
C Mode) ................... 264
2
C Mode) .............. 265
Preliminary
PIC18F97J60 FAMILY
RESET ............................................................................. 387
Reset ................................................................................. 53
Resets ............................................................................. 343
RETFIE ............................................................................ 388
RETLW ............................................................................ 388
RETURN .......................................................................... 389
Return Address Stack ........................................................ 71
Return Stack Pointer (STKPTR) ........................................ 72
Revision History ............................................................... 453
RLCF ............................................................................... 389
RLNCF ............................................................................. 390
RRCF ............................................................................... 390
RRNCF ............................................................................ 391
S
SCKx ............................................................................... 253
SDIx ................................................................................. 253
SDOx ............................................................................... 253
SEC_IDLE Mode ............................................................... 50
SEC_RUN Mode ................................................................ 46
Serial Clock, SCKx .......................................................... 253
Serial Data In (SDIx) ........................................................ 253
Serial Data Out (SDOx) ................................................... 253
Serial Peripheral Interface. See SPI Mode.
SETF ............................................................................... 391
Slave Select (SSx) ........................................................... 253
SLEEP ............................................................................. 392
Sleep
Software Simulator (MPLAB SIM) ................................... 408
Special Event Trigger. See Compare (ECCP Module).
Special Features of the CPU ........................................... 343
Special Function Registers
STATUS .................................................................... 87
STKPTR (Stack Pointer) ............................................ 72
T0CON (Timer0 Control) ......................................... 163
T1CON (Timer1 Control) ......................................... 167
T2CON (Timer2 Control) ......................................... 173
T3CON (Timer3 Control) ......................................... 175
T4CON (Timer4 Control) ......................................... 179
TXSTAx (Transmit Status
WDTCON (Watchdog Timer
Brown-out Reset (BOR) ............................................. 53
Configuration Mismatch (CM) .................................... 53
MCLR Reset, During
MCLR Reset, Normal Operation ................................ 53
Power-on Reset (POR) .............................................. 53
Reset Instruction ........................................................ 53
Stack Full Reset ........................................................ 53
Stack Underflow Reset .............................................. 53
State of Registers ...................................................... 58
Watchdog Timer (WDT) Reset .................................. 53
Brown-out Reset (BOR) ........................................... 343
Oscillator Start-up Timer (OST) ............................... 343
Power-on Reset (POR) ............................................ 343
Power-up Timer (PWRT) ......................................... 343
Stack Full/Underflow .................................................. 73
OSC1 and OSC2 Pin States ...................................... 44
Ethernet SFRs ........................................................... 80
and Control x) .................................................. 300
Control) ............................................................ 351
Power-Managed Modes .................................... 53
DS39762B-page 463