PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 159

• Manufacturer Part Number: PIC18F97J60-I/PF
• Description: IC PIC MCU FLASH 65KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F97J60-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

10.10 PORTJ, TRISJ and
PORTJ is implemented as a bidirectional port in two
different ways:
• 80-pin devices: 2 bits wide (RJ<5:4>)
• 100-pin devices: 8 bits wide (RJ<7:0>)
The corresponding Data Direction register is TRISJ.
Setting a TRISJ bit (= 1) will make the corresponding
PORTJ pin an input (i.e., put the corresponding output
driver in a high-impedance mode). Clearing a TRISJ bit
(= 0) will make the corresponding PORTJ pin an output
(i.e., put the contents of the output latch on the selected
pin). All pins on PORTJ are digital only and tolerate
voltages up to 5.5V.
The Output Latch register (LATJ) is also memory
mapped. Read-modify-write operations on the LATJ
register read and write the latched output value for
PORTJ.
All pins on PORTJ are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
© 2006 Microchip Technology Inc.
Note:
Note:
LATJ Registers
PORTJ is available only on 80-pin and
100-pin devices.
These pins are configured as digital inputs
on any device Reset.
Preliminary
PIC18F97J60 FAMILY
When the external memory interface is enabled, all of
the PORTJ pins function as control outputs for the
interface. This occurs automatically when the interface
is enabled by clearing the EBDIS control bit
(MEMCON<7>). The TRISJ bits are also overridden.
Each of the PORTJ pins has a weak internal pull-up. A
single control bit can turn on all the pull-ups. This is
performed by setting bit, RJPU (PORTA<7>). The
weak pull-up is automatically turned off when the port
pin is configured as an output. The pull-ups are
disabled on all device Resets.
EXAMPLE 10-9:
CLRF
CLRF
MOVLW
MOVWF
PORTJ
LATJ
0CFh
TRISJ
; Initialize PORTG by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RJ3:RJ0 as inputs
; RJ5:RJ4 as output
; RJ7:RJ6 as inputs
INITIALIZING PORTJ
DS39762B-page 157