PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 222

• Manufacturer Part Number: PIC18F97J60-I/PF
• Description: IC PIC MCU FLASH 65KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F97J60-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F97J60 FAMILY
REGISTER 18-9:
REGISTER 18-10: PHSTAT1: PHYSICAL LAYER STATUS REGISTER 1
DS39762B-page 220
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13-12
bit 11-10
bit 9
bit 8
bit 7
bit 6-0
bit 15
bit 7
Legend:
R = Read-only bit
-n = Value at POR
bit 15-13
bit 12-11
bit 10-3
bit 2
bit 1
bit 0
R/W-0
R/W-0
U-0
U-0
—
—
r
r
Reserved: Write as ‘0’
Unimplemented: Read as ‘0’
Reserved: Write as ‘0’
Unimplemented: Read as ‘0’
PDPXMD: PHY Duplex Mode bit
1 = PHY operates in Full-Duplex mode, application must also set FULDPX (MACON3<0>)
0 = PHY operates in Half-Duplex mode, application must also clear FULDPX
Reserved: Maintain as ‘0’
Unimplemented: Read as ‘0’
Unimplemented: Read as ‘0’
Reserved: Read as ‘1’
Unimplemented: Read as ‘0’
LLSTAT: PHY Latching Link Status bit
1 = Link is up and has been up continously since PHSTAT1 was last read
0 = Link is down or was down for a period since PHSTAT1 was last read
Reserved: Ignore on read
Unimplemented: Read as ‘0’
R/W-0
U-0
U-0
U-0
—
—
—
r
PHCON1: PHY CONTROL REGISTER 1
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
‘0’ = Bit is cleared
R/L = Read-only latch bit
U-0
U-0
U-0
U-0
—
—
—
—
U-0
U-0
R-1
U-0
—
—
—
Preliminary
r
U = Unimplemented bit, read as ‘0’
LL = Bit latches low
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
R/W-0
U-0
R-1
U-0
—
—
r
r
LLSTAT
R/LL-0
R/W-0
U-0
U-0
—
—
r
© 2006 Microchip Technology Inc.
x = Bit is unknown
LH = Bit latches high
R/LH-0
U-0
U-0
U-0
—
—
—
r
PDPXMD
R/W-0
U-0
U-0
U-0
—
—
—
bit 8
bit 0
bit 8
bit 0