PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 205
![IC PIC MCU FLASH 65KX16 100TQFP](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC18F97J60-I/PF
Manufacturer Part Number
PIC18F97J60-I/PF
Description
IC PIC MCU FLASH 65KX16 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F66J65-IPT.pdf
(8 pages)
3.PIC18F66J65-IPT.pdf
(480 pages)
4.PIC18F66J65-IPT.pdf
(4 pages)
5.PIC18F66J65-IPT.pdf
(10 pages)
6.PIC18F96J60-IPT.pdf
(24 pages)
7.PIC18F97J60-IPF.pdf
(472 pages)
Specifications of PIC18F97J60-I/PF
Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
100-TQFP, 100-VQFP
Core Processor
PIC
Core Size
8-Bit
Speed
41.667MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
70
Ram Size
3808 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3808 B
Interface Type
Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
41.667 MHz
Number Of Programmable I/os
70
Number Of Timers
5
Operating Supply Voltage
2.35 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Package
100TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
41.667 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
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Quantity
Price
Company:
Part Number:
PIC18F97J60-I/PF
Manufacturer:
MICRRCHIP
Quantity:
1 800
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Part Number:
PIC18F97J60-I/PF
Manufacturer:
Microchip Technology
Quantity:
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Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC18F66J65-IPT PDF datasheet #2
- PIC18F66J65-IPT PDF datasheet #3
- PIC18F66J65-IPT PDF datasheet #4
- PIC18F66J65-IPT PDF datasheet #5
- PIC18F96J60-IPT PDF datasheet #6
- PIC18F97J60-IPF PDF datasheet #7
- Current page: 205 of 472
- Download datasheet (8Mb)
17.4.9
The following steps should be taken when configuring
the ECCP1 module for PWM operation:
1.
2.
3.
4.
5.
6.
7.
© 2006 Microchip Technology Inc.
Configure the PWM pins P1A and P1B (and
P1C and P1D, if used) as inputs by setting the
corresponding TRIS bits.
Set the PWM period by loading the PR2 (PR4)
register.
Configure the ECCP1 module for the desired
PWM mode and configuration by loading the
CCP1CON register with the appropriate values:
• Select one of the available output
• Select the polarities of the PWM output
Set the PWM duty cycle by loading the CCPR1L
register and the CCP1CON<5:4> bits.
For auto-shutdown:
• Disable auto-shutdown; ECCP1ASE = 0
• Configure auto-shutdown source
• Wait for Run condition
For
dead-band delay by loading ECCP1DEL<6:0>
with the appropriate value.
If auto-shutdown operation is required, load the
ECCP1AS register:
• Select the auto-shutdown sources using the
• Select the shutdown states of the PWM
• Set the ECCP1ASE bit (ECCP1AS<7>).
configurations and direction with the
P1M1:P1M0 bits.
signals with the CCP1M3:CCP1M0 bits.
ECCP1AS2:ECCP1AS0 bits.
output pins using PSS1AC1:PSS1AC0 and
PSS1BD1:PSS1BD0 bits.
Half-Bridge
SETUP FOR PWM OPERATION
Output
mode,
set
the
Preliminary
PIC18F97J60 FAMILY
8.
9.
10. Enable PWM outputs after a new PWM cycle
17.4.10
Both Power-on Reset and subsequent Resets will force
all ports to Input mode and the CCPx/ECCPx registers
to their Reset states.
This forces the Enhanced CCPx modules to reset to a
state compatible with the standard CCPx modules.
If auto-restart operation is required, set the
P1RSEN bit (ECCP1DEL<7>).
Configure and start TMR2 (TMR4):
• Clear the TMRx interrupt flag bit by clearing
• Set the TMRx prescale value by loading the
• Enable Timer2 (or Timer4) by setting the
has started:
• Wait until TMR2 (TMR4) overflows (TMRxIF
• Enable the ECCP1/P1A, P1B, P1C and/or
• Clear the ECCP1ASE bit (ECCP1AS<7>).
the TMRxIF bit (PIR1<1> for Timer2 or
PIR3<3> for Timer4).
TxCKPS bits (T2CON<1:0> for Timer2 or
T4CON<1:0> for Timer4).
TMRxON bit (T2CON<2> for Timer2 or
T4CON<2> for Timer4).
bit is set).
P1D pin outputs by clearing the respective
TRIS bits.
EFFECTS OF A RESET
DS39762B-page 203
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