PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 195

• Manufacturer Part Number: PIC18F97J60-I/PF
• Description: IC PIC MCU FLASH 65KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F97J60-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.4
The Enhanced PWM mode provides additional PWM
output options for a broader range of control applica-
tions. The module is a backward compatible version of
the standard CCPx modules and offers up to four out-
puts, designated PxA through PxD. Users are also able
to select the polarity of the signal (either active-high or
active-low). The module’s output mode and polarity
are configured by setting the PxM1:PxM0 and
CCPxM3CCPxM0 bits of the CCPxCON register
(CCPxCON<7:6> and <3:0>, respectively).
For the sake of clarity, Enhanced PWM mode operation
is described generically throughout this section with
respect to ECCP1 and TMR2 modules. Control register
names are presented in terms of ECCP1. All three
Enhanced modules, as well as the two timer resources,
can be used interchangeably and function identically.
TMR2 or TMR4 can be selected for PWM operation by
selecting the proper bits in T3CON.
Figure 17-1 shows a simplified block diagram of PWM
operation. All control registers are double-buffered and
are loaded at the beginning of a new PWM cycle (the
period boundary when Timer2 resets) in order to pre-
vent glitches on any of the outputs. The exception is the
ECCP1 Dead-Band Delay register, ECCP1DEL, which
is loaded at either the duty cycle boundary or the
boundary period (whichever comes first). Because of
the buffering, the module waits until the assigned timer
resets instead of starting immediately. This means that
FIGURE 17-1:
© 2006 Microchip Technology Inc.
Enhanced PWM Mode
Note: The 8-bit timer TMR2 register is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler, to create the 10-bit
CCPR1H (Slave)
Duty Cycle Registers
Comparator
CCPR1L
time base.
PR2
TMR2
Comparator
SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODULE
(Note 1)
Clear Timer,
set ECCP1 pin and
latch D.C.
CCP1CON<5:4>
R
S
P1M1<1:0>
Q
Preliminary
PIC18F97J60 FAMILY
ECCP1DEL
Controller
Enhanced PWM waveforms do not exactly match the
standard PWM waveforms, but are instead, offset by
one full instruction cycle (4 T
As before, the user must manually configure the
appropriate TRIS bits for output.
17.4.1
The PWM period is specified by writing to the PR2
register. The PWM period can be calculated using the
following equation:
EQUATION 17-1:
PWM frequency is defined as 1/[PWM period]. When
TMR2 is equal to PR2, the following three events occur
on the next increment cycle:
• TMR2 is cleared
• The ECCP1 pin is set (if PWM duty cycle = 0%,
• The PWM duty cycle is copied from CCPR1L into
ECCP1/P1A
Output
2
the ECCP1 pin will not be set)
CCPR1H
Note:
P1C
P1D
P1B
PWM Period = [(PR2) + 1] • 4 • T
CCP1M<3:0>
4
PWM PERIOD
The Timer2 postscaler (see Section 13.0
“Timer2 Module”) is not used in the
determination of the PWM frequency. The
postscaler could be used to have a servo
update rate at a different frequency than
the PWM output.
TRISx<x>
TRISx<x>
TRISx<x>
TRISx<x>
(TMR2 Prescale Value)
OSC
).
DS39762B-page 193
ECCP1/P1A
P1B
P1C
P1D
OSC
•