PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 194

• Manufacturer Part Number: PIC18F97J60-I/PF
• Description: IC PIC MCU FLASH 65KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F97J60-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F97J60 FAMILY
TABLE 17-3:
17.2
Except for the operation of the Special Event Trigger
discussed below, the Capture and Compare modes of
the ECCPx modules are identical in operation to that of
CCP4. These are discussed in detail in Section 16.2
“Capture
Mode”.
17.2.1
ECCP1 and ECCP2 incorporate an internal hardware
trigger that is generated in Compare mode on a match
between the CCPRx register pair and the selected
timer. This can be used in turn to initiate an action. This
mode is selected by setting CCPxCON<3:0> to ‘1011’.
The Special Event Trigger output of either ECCP1 or
ECCP2 resets the TMR1 or TMR3 register pair,
depending on which timer resource is currently
selected. This allows the CCPRx register to effectively
be a 16-Bit Programmable Period register for Timer1 or
Timer3. In addition, the ECCP2 Special Event Trigger
will also start an A/D conversion if the A/D module is
enabled.
DS39762B-page 192
Compatible CCP
Dual PWM
Quad PWM
Compatible CCP
Dual PWM
Quad PWM
Compatible CCP
Dual PWM
Compatible CCP
Legend: x = Don’t care. Shaded cells indicate pin assignments not used by ECCP3 in a given mode.
Note 1:
ECCP Mode
100-Pin Devices, ECCPMX = 1, Extended Microcontroller mode with 16-Bit or 20-Bit Address Width:
2:
3:
Capture and Compare Modes
ECCP3/P3A and CCP4/P3D are multiplexed with RD1 and RD2 on 64-pin devices, and RG0 and RG3 on
80-pin and 100-pin devices.
These pin options are not available on 64-pin devices.
With ECCP3 in Quad PWM mode, the CCP4 pin’s output is overridden by P3D; otherwise, CCP4 is fully
operational.
SPECIAL EVENT TRIGGER
Mode”
(3)
100-Pin Devices, ECCPMX = 1, Extended Microcontroller with 12-Bit Address Width:
PIN CONFIGURATIONS FOR ECCP3
Configuration
00xx 11xx
10xx 11xx
x1xx 11xx
00xx 11xx
10xx 11xx
x1xx 11xx
00xx 11xx
10xx 11xx
00xx 11xx
CCP3CON
and
100-Pin Devices, ECCPMX = 0, All Program Memory modes:
Section 16.3
100-Pin Devices, ECCPMX = 1, Microcontroller mode:
64-Pin Devices; 80-Pin Devices, ECCPMX = 1;
RD1 or
ECCP3
ECCP3
ECCP3
ECCP3
RG0
P3A
P3A
P3A
P3A
P3A
(1)
80-Pin Devices, ECCPMX = 0;
“Compare
RE6/AD14
RE6/AD14
RE6/AD14
RE4/AD12
RE6/AD14
Preliminary
RE4
RE4
P3B
P3B
P3B
Special Event Triggers are not implemented for
ECCP3, CCP4 or CCP5. Selecting the Special Event
Trigger mode for these modules has the same effect as
selecting the Compare with Software Interrupt mode
(CCPxM3:CCPxM0 = 1010).
17.3
When configured in Single Output mode, the ECCPx
modules function identically to the standard CCPx
modules in PWM mode, as described in Section 16.4
“PWM Mode”. This is also sometimes referred to as
“Compatible
through 17-3.
RE5/AD13
RE5/AD13
RE5/AD13
RE3/AD11
RE3/AD11
RE5/AD13
Note:
Note:
RE3
RE3
RE3
P3C
Standard PWM Mode
The Special Event Trigger from ECCP2
will not set the Timer1 or Timer3 interrupt
flag bits.
When setting up single output PWM
operations, users are free to use either of
the processes described in Section 16.4.3
“Setup
Section 17.4.9 “Setup for PWM Opera-
tion”. The latter is more generic but will
work for either single or multi-output PWM.
RD2/RG3
RD2/RG3
RD2/RG3
RD2/RG3
RD2/RG3
RD2/RG3
RD2/RG3
CCP”
RD2 or
RG3
P3D
P3D
(1)
for
mode,
© 2006 Microchip Technology Inc.
RH5/AN13
RH5/AN13
RH5/AN13
RH5/AN13
RH5/AN13
RH5/AN13
RH5/AN13
PWM
RH5
P3B
P3B
as
(2)
Operation”
in
RH4/AN12
RH4/AN12
RH4/AN12
RH4/AN12
RH4/AN12
RH4/AN12
RH4/AN12
RH4/AN12
Tables 17-1
RH4
P3C
(2)
or