PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 158
![IC PIC MCU FLASH 65KX16 100TQFP](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC18F97J60-I/PF
Manufacturer Part Number
PIC18F97J60-I/PF
Description
IC PIC MCU FLASH 65KX16 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F66J65-IPT.pdf
(8 pages)
3.PIC18F66J65-IPT.pdf
(480 pages)
4.PIC18F66J65-IPT.pdf
(4 pages)
5.PIC18F66J65-IPT.pdf
(10 pages)
6.PIC18F96J60-IPT.pdf
(24 pages)
7.PIC18F97J60-IPF.pdf
(472 pages)
Specifications of PIC18F97J60-I/PF
Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
100-TQFP, 100-VQFP
Core Processor
PIC
Core Size
8-Bit
Speed
41.667MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
70
Ram Size
3808 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3808 B
Interface Type
Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
41.667 MHz
Number Of Programmable I/os
70
Number Of Timers
5
Operating Supply Voltage
2.35 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Package
100TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
41.667 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F97J60-I/PF
Manufacturer:
MICRRCHIP
Quantity:
1 800
Company:
Part Number:
PIC18F97J60-I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F97J60-I/PF
Manufacturer:
MICROCHI
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC18F66J65-IPT PDF datasheet #2
- PIC18F66J65-IPT PDF datasheet #3
- PIC18F66J65-IPT PDF datasheet #4
- PIC18F66J65-IPT PDF datasheet #5
- PIC18F96J60-IPT PDF datasheet #6
- PIC18F97J60-IPF PDF datasheet #7
- Current page: 158 of 472
- Download datasheet (8Mb)
PIC18F97J60 FAMILY
TABLE 10-17: PORTH FUNCTIONS
TABLE 10-18: SUMMARY OF REGISTERS ASSOCIATED WITH PORTH
DS39762B-page 156
RH0/A16
RH1/A17
RH2/A18
RH3/A19
RH4/AN12/P3C
RH5/AN13/P3B
RH6/AN14/P1C
RH7/AN15/P1B
Legend:
Note 1:
PORTH
LATH
TRISH
Pin Name
Name
2:
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Unimplemented on 80-pin devices.
Alternate assignments for P1B/P1C and P3B/P3C when ECCPMX Configuration bit is cleared (80-pin and 100-pin
devices only). Default assignments are PORTE<6:3>.
TRISH7
LATH7
Function
Bit 7
RH7
P3C
P3B
P1C
P1B
A16
A17
A18
A19
AN12
AN13
AN14
AN15
RH0
RH1
RH2
RH3
RH4
RH5
RH6
RH7
(1)
(1)
(1)
(1)
(2)
(2)
(2)
(2)
Setting
TRISH6
LATH6
TRIS
Bit 6
RH6
0
1
x
0
1
x
0
1
x
0
1
x
0
1
0
0
1
0
0
1
0
0
1
0
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
TRISH5
LATH5
Bit 5
RH5
Type
ANA
ANA
ANA
ANA
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
ST
LATH<0> data output.
PORTH<0> data input.
External memory interface, address line 16. Takes priority over port data.
LATH<1> data output.
PORTH<1> data input.
External memory interface, address line 17. Takes priority over port data.
LATH<2> data output.
PORTH<2> data input.
External memory interface, address line 18. Takes priority over port data.
LATH<3> data output.
PORTH<3> data input.
External memory interface, address line 19. Takes priority over port data.
LATH<4> data output.
PORTH<4> data input.
A/D input channel 12. Default input configuration on POR; does not affect
digital output.
ECCP3 Enhanced PWM output, channel C; takes priority over port and PSP
data. May be configured for tri-state during Enhanced PWM shutdown events.
LATH<5> data output.
PORTH<5> data input.
A/D input channel 13. Default input configuration on POR; does not affect
digital output.
ECCP3 Enhanced PWM output, channel B; takes priority over port and PSP
data. May be configured for tri-state during Enhanced PWM shutdown events.
LATH<6> data output.
PORTH<6> data input.
A/D input channel 14. Default input configuration on POR; does not affect
digital output.
ECCP1 Enhanced PWM output, channel C; takes priority over port and PSP
data. May be configured for tri-state during Enhanced PWM shutdown events.
LATH<7> data output.
PORTH<7> data input.
A/D input channel 15. Default input configuration on POR; does not affect
digital output.
ECCP1 Enhanced PWM output, channel B; takes priority over port and PSP
data. May be configured for tri-state during Enhanced PWM shutdown events.
TRISH4
Preliminary
LATH4
Bit 4
RH4
TRISH3
LATH3
Bit 3
RH3
TRISH2
LATH2
Bit 2
RH2
Description
TRISH1
LATH1
Bit 1
RH1
© 2006 Microchip Technology Inc.
TRISH0
LATH0
Bit 0
RH0
on Page:
Values
Reset
62
61
61
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