PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 466

• Manufacturer Part Number: PIC18F97J60-I/PF
• Description: IC PIC MCU FLASH 65KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F97J60-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F97J60 FAMILY
SPI Mode (MSSP)
SSPOV ............................................................................. 288
SSPOV Status Flag .......................................................... 288
SSPSTAT Register
SSPxSTAT Register
SSx ................................................................................... 253
SUBFSR ........................................................................... 403
SUBFWB .......................................................................... 392
SUBLW ............................................................................ 393
SUBULNK ........................................................................ 403
SUBWF ............................................................................ 393
SUBWFB .......................................................................... 394
SWAPF ............................................................................ 394
T
Table Pointer Operations (table) ........................................ 98
Table Reads/Table Writes .................................................. 73
TBLRD ............................................................................. 395
TBLWT ............................................................................. 396
Timer0 .............................................................................. 163
Timer1 .............................................................................. 167
DS39762B-page 464
Associated Registers ............................................... 262
Bus Mode Compatibility ........................................... 261
Clock Speed and Module Interactions ..................... 261
Effects of a Reset ..................................................... 261
Enabling SPI I/O ...................................................... 257
Master Mode ............................................................ 258
Master/Slave Connection ......................................... 257
Operation ................................................................. 256
Operation in Power-Managed Modes ...................... 261
Serial Clock .............................................................. 253
Serial Data In ........................................................... 253
Serial Data Out ........................................................ 253
Slave Mode .............................................................. 259
Slave Select ............................................................. 253
Slave Select Synchronization .................................. 259
SPI Clock ................................................................. 258
Typical Connection .................................................. 257
R/W Bit ..................................................................... 270
R/W Bit ..................................................................... 268
Associated Registers ............................................... 165
Clock Source Select (T0CS Bit) ............................... 164
Operation ................................................................. 164
Overflow Interrupt .................................................... 165
Prescaler .................................................................. 165
Prescaler Assignment (PSA Bit) .............................. 165
Prescaler Select (T0PS2:T0PS0 Bits) ..................... 165
Prescaler, Switching Assignment ............................. 165
Prescaler. See Prescaler, Timer0.
Reads and Writes in 16-Bit Mode ............................ 164
Source Edge Select (T0SE Bit) ................................ 164
16-Bit Read/Write Mode ........................................... 169
Associated Registers ............................................... 171
Considerations in Asynchronous Counter Mode ...... 170
Interrupt .................................................................... 170
Operation ................................................................. 168
Oscillator .......................................................... 167, 169
Overflow Interrupt .................................................... 167
Resetting, Using the ECCPx
Special Event Trigger (ECCP) ................................. 192
TMR1H Register ...................................................... 167
TMR1L Register ....................................................... 167
Use as a Clock Source ............................................ 169
Use as a Real-Time Clock ....................................... 170
Layout Considerations ..................................... 169
Special Event Trigger ....................................... 170
Preliminary
Timer2 .............................................................................. 173
Timer3 .............................................................................. 175
Timer4 .............................................................................. 179
Timing Diagrams
Associated Registers ............................................... 174
Interrupt ................................................................... 174
Operation ................................................................. 173
Output ...................................................................... 174
PR2 Register ................................................... 186, 193
TMR2 to PR2 Match Interrupt .................................. 193
16-Bit Read/Write Mode .......................................... 177
Associated Registers ............................................... 177
Operation ................................................................. 176
Oscillator .......................................................... 175, 177
Overflow Interrupt ............................................ 175, 177
Resetting Using the ECCPx
TMR3H Register ...................................................... 175
TMR3L Register ....................................................... 175
Associated Registers ............................................... 180
MSSPx Clock, Output .............................................. 180
Operation ................................................................. 179
Postscaler. See Postscaler, Timer4.
PR4 Register ................................................... 179, 186
Prescaler. See Prescaler, Timer4.
TMR4 Register ......................................................... 179
TMR4 to PR4 Match Interrupt .......................... 179, 180
A/D Conversion ........................................................ 444
Asynchronous Reception, RXDTP = 0
Asynchronous Transmission (Back-to-Back),
Asynchronous Transmission, TXCKP = 0
Automatic Baud Rate Calculation ............................ 308
Auto-Wake-up Bit (WUE) During
Auto-Wake-up Bit (WUE) During Sleep ................... 315
Baud Rate Generator with Clock Arbitration ............ 285
BRG Overflow Sequence ......................................... 308
BRG Reset Due to SDAx Arbitration During
Capture/Compare/PWM (Including
CLKO and I/O .......................................................... 429
Clock Synchronization ............................................. 278
Clock/Instruction Cycle .............................................. 74
EUSARTx Synchronous Receive
EUSARTx Synchronous Transmission
Example SPI Master Mode (CKE = 0) ..................... 435
Example SPI Master Mode (CKE = 1) ..................... 436
Example SPI Slave Mode (CKE = 0) ....................... 437
Example SPI Slave Mode (CKE = 1) ....................... 438
External Clock (All Modes Except PLL) ................... 427
External Memory Bus for Sleep
External Memory Bus for TBLRD
Fail-Safe Clock Monitor ........................................... 355
First Start Bit ............................................................ 286
Full-Bridge PWM Output .......................................... 197
Half-Bridge PWM Output ......................................... 196
I
2
C Acknowledge Sequence .................................... 291
Special Event Trigger ...................................... 177
(RXx Not Inverted) ........................................... 313
TXCKP = 0 (TXx Not Inverted) ........................ 310
(TXx Not Inverted) ........................................... 310
Normal Operation ............................................ 315
Start Condition ................................................. 294
ECCPx Modules) ............................................. 434
(Master/Slave) ................................................. 443
(Master/Slave) ................................................. 443
(Extended Microcontroller Mode) ............ 112, 114
(Extended Microcontroller Mode) ............ 112, 114
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