PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 211

• Manufacturer Part Number: PIC18F97J60-I/PF
• Description: IC PIC MCU FLASH 65KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F97J60-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

18.2.1
The Ethernet buffer contains the transmit and receive
memory used by the Ethernet controller. The entire
buffer is 8 Kbytes, divided into separate receive and
transmit buffer spaces. The sizes and locations of
transmit and receive memory are fully definable using
the pointers in the Ethernet SFR space. The organiza-
tion of the memory space and the relationships of the
pointers are shown in Figure 18-4.
The buffer is always accessible through the EDATA and
Ethernet Pointer SFRs, regardless of whether or not the
Ethernet module is enabled. This makes the buffer
potentially useful for applications requiring large amounts
of RAM and that do not require Ethernet communication.
In these instances, disabling the Ethernet module
reduces overall power usage but does not prevent buffer
access.
18.2.1.1
The Ethernet buffer contents are accessed through the
EDATA register, which acts as a window from the
microcontroller data bus into the buffer. The location of
FIGURE 18-4:
© 2006 Microchip Technology Inc.
ETHERNET BUFFER AND BUFFER
POINTER REGISTERS
Reading and Writing to the Buffer
Transmit Buffer Start
(ETXSTH:ETXSTL)
Buffer Write Pointer
(EWRPTH:EWRPTL)
Transmit Buffer End
(ETXNDH:ETXNDL)
Receive Buffer Start
(ERXSTH:ERXSTL)
Buffer Read Pointer
(ERDPTH:ERDPTL)
Receive Buffer End
(ERXNDH:ERXNDL)
ETHERNET BUFFER ORGANIZATION
(Circular FIFO)
Preliminary
Transmit
Receive
Buffer
Buffer
AAh
55h
PIC18F97J60 FAMILY
that window is determined by either the ERDPT or
EWRPT Pointers, depending on the operation being
performed. For example, writing to EDATA causes a
write to the Ethernet buffer at the address currently
indicated by EWRPT register pair. Similarly, moving
the contents of EDATA to another register actually
moves the buffer contents at the address indicated by
the ERDPT Pointer.
When the AUTOINC bit (ECON2<7>) is set, the asso-
ciated Read or Write Pointer increments by one
address following each read or write operation. This
eliminates the need to constantly update a pointer after
each read or write, simplifying multiple sequential
operations. By default, the AUTOINC bit is set.
While sequentially reading from the receive buffer, a
wrapping condition will occur at the end of the receive
buffer. A read of EDATA from the address programmed
into the ERXND Pointers will cause the ERDPT
registers to be incremented to the value contained in
the ERXST Pointers. Writing to the buffer, on the other
hand, does not result in automatic wrapping.
0000h
1FFFh
Write Buffer Data
(data AAh moved to EDATA)
Read Buffer Data
(data 55h moved out of EDATA)
DS39762B-page 209